Samsung Display Co., Ltd.

Jae-Jin Song

Hoon Bae Kim

Jang-Il Kim

Su-Jeong Kim

Sung Hoon Kim

Hoon Sik Kim

Hyung-Guel Kim

Yoon-Jang Kim

Jae-Hoon Jung

Ki-Chul Shin

Joo-Seok Yeom

Seung Soo Baek

Ho-Kil Oh

Sang Ho Kim

Byoung-Sun Na

Kwang-chul Jung

Jong-in Kim

Sang Wook Lee

Byeong-Beom Kim

Chang Il Tae

Hyun-Ho Kang

Jae-Hyoung Youn

Jean-Ho Song

Young Goo Song

Sung-Ryul Kim

Jung Suk Bang

Eun-Kil Park

O-Sung Seo

Dae Cheol Kim

Je-Hyeong Park

Bo Yeong Kim

Yong Woo Hyung

Woong Kwon Kim

Nam-Heon Kim

Jeong Soo Choi

Sung Ryul Kim

Sungmin Son

Hea Chun Lee

Ki Hun Jeong

Seung-Soo Baek

Hai-Jung In

Kee-Bum Park

Jung Hwan Hwang

Youn Hak Jeong

Sang Yong No

Hyuk-Jin Kim

Kwi Hyun Kim

Byoung Sun Na

Seung-hwan Kim

Kook Hyun Choi

Hyung-Jun Daniel Park

Kwang-Chul Jung

Jang Soo Kim

Si Hyun Ahn

Woo-Jung Shin

Chan Wook Shim

Hye-Rim Han

Sung-Hee Hong

Ki-Won Park

A pixel circuit includes a light emitting element, a first transistor, a second transistor, and a third transistor. The first transistor applies a driving current to the light emitting element. The second transistor and the third transistor apply an initialization voltage to a first electrode of the light emitting element. The second transistor and the third transistor are electrically connected to each other in series.

Pixel circuit and display apparatus including the same

A repair pixel and a display apparatus including the repair pixel, the display panel including a repair pixel for a pixel row or a plurality of repair pixels for a pixel row so that repair may be performed using the repair pixel when a bad pixel occurs in the corresponding pixel row. The bad pixel is repaired using the repair pixel so that the yield of the display panel may be enhanced.

Repair pixel and display apparatus having the same

A display device includes: a display panel in which a plurality of pixels are arranged; a plurality of gate lines disposed in the display panel and transmitting a gate signal to the plurality of pixels; a gate driver disposed in the display panel and including a plurality of stages for generating the gate signal and outputting the gate signal to the plurality of gate lines; and a plurality of clock signal lines disposed in the display panel and transmitting a clock signal to the plurality of stages. Each stage of the plurality of stages includes a clock signal terminal connected to one of the plurality of clock signal lines to receive the clock signal, a first output terminal connected to a corresponding gate line to output the gate signal, and a first transistor and a second transistor connected to the first output terminal. The stages have a substantially same area, and a size of the second transistor of a first stage disposed at an upper portion of the display panel is different from a size of the second transistor of a second stage disposed at a lower portion of the display panel.

Display device

A liquid crystal display includes: a first substrate, a second substrate facing the first substrate, a liquid crystal layer interposed between the first substrate and the second substrate and including liquid crystal molecules, a gate line positioned on the first substrate, a data line positioned on the first substrate and crossing the gate line, a first thin film transistor and a second thin film transistor connected to the gate line and the data line, a third thin film transistor connected to the gate line and the second thin film transistor, a reference voltage line connected to the third thin film transistor, and a pixel electrode including a first subpixel electrode connected to the first thin film transistor and a second subpixel electrode connected to the second thin film transistor.

Liquid crystal display

A liquid crystal display is provided. A liquid crystal display includes: a first substrate; a thin film transistor disposed on the first substrate; and a first electrode disposed on the thin film transistor and connected to an output terminal of the thin film transistor, wherein the first electrode includes a first region and a second region each including a plurality of minute branches separated from each other by open parts, portions of at least two minute branches among the plurality of minute branches are connected to form a plurality of minute plate branches, and wherein the minute plate branch has a wider width than a minute branch.

A display substrate includes a thin film transistor array disposed in a display area, a signal line disposed in a peripheral area surrounding the display area, a contact electrode disposed on the signal line and contacting the signal line, a light-blocking pattern overlapping a first portion of the contact electrode, and a color pattern overlapping a second portion of the contact electrode.

Display substrate and liquid crystal display device having the same

Touch-related information which cannot be acquired by the naked eye (dubbed here as sub-optical pattern information) has its corresponding sub-optical patterns respectively positioned within the aperture areas of respective domains such that the displayed image, as viewed from different viewing angles is not adversely affected by the embedded sub-optical patterns. One type of touch-related information which can be conveyed is that of touch location of a sub-optical pattern sensing pen positioned over one or more of the sub-optical patterns.

A liquid crystal display includes a first substrate, a first gate line disposed on the first substrate, a second gate line disposed on the first substrate, a data line disposed on the first substrate, a reference voltage line disposed on the first substrate and extending substantially to be parallel to the data line, a first subpixel electrode disposed in a pixel area on the first substrate, a second subpixel electrode disposed in the pixel area on the first substrate, a first switching element connected to the first gate line, the data line and the first subpixel electrode, a second switching element connected to the first gate line, the data line and the second subpixel electrode, and a third switching element connected to the first subpixel electrode and the reference voltage line.

The present invention relates to a thin film transistor array panel including: a substrate; gate lines formed on the substrate; and a gate driver formed on the substrate to apply gate signals to the gate lines. The gate driver includes a first wire and a second wire to transmit different signals, and at least one of the first wire and the second wire includes a static electricity preventing structure to prevent static electricity from accumulating between the first wire and the second wire.

Thin film transistor array panel

An array substrate includes a base substrate and a contact part. The contact part is disposed on the base substrate. The contact part includes a first metal pattern, a disconnection control pattern and a connecting pattern. The second metal pattern is disposed on a layer different from the first metal pattern, the disconnection control pattern overlaps a side surface of the second metal pattern and a connecting pattern is formed on the first and second metal patterns and the disconnection control pattern and connects the first metal pattern with the second metal pattern.

Array substrate and method of manufacturing the same

A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material.

Thin film transistor substrate and manufacturing method thereof

Growing community of inventors

Hwaseong-si, South Korea

Jae-Jin Song