Skhynix Inc.

Jae Hyun Son

Min Kyu Kang

Byoung Do Lee

Ji Hyeok Shin

Jong Hoon Kim

Woong Il Choi

Tae Min Kang

Dae Woong Lee

Chul Keun Yoon

Yu Hwan Kim

Kuk Jin Chun

Yu Gyeong Hwang

A semiconductor package includes a first semiconductor chip and a second semiconductor chip which are disposed side-by-side on a surface of a package substrate. A heat insulation wall is disposed between the first semiconductor chip and the second semiconductor chip. The heat insulation wall thermally isolates the first semiconductor chip from the second semiconductor chip.

Semiconductor packages including a heat insulation wall

The disclosure relates to a semiconductor chip and a stacked type semiconductor package having the same. The semiconductor chip includes: a semiconductor chip body having a first surface formed with a plurality of bonding pads and a second surface which is opposite to the first surface, a plurality of first and second through electrodes that pass through the semiconductor chip body and one ends thereof are electrically connected to the bonding pads, an insulating layer formed over the second surface of the semiconductor chip body such that the other ends of the first and second through electrodes are not covered by the insulating layer, and a first heat spreading layer formed over the insulating layer.

Semiconductor chip and stacked type semiconductor package having the same

A stack package having a plurality of stacked chips includes first voltage dropping units respectively formed in the plurality of chips, the first voltage dropping units are electrically coupled by a first line; second voltage dropping units respectively formed in the plurality of chips, the second dropping units are electrically coupled by a second line; first signal generation units respectively formed in the plurality of chips, each of the first signal generation units is connected to an output node of the first voltage dropping units, respectively; and second signal generation units respectively formed in the plurality of chips, each of the second signal generation units is connected to an input node of the second voltage dropping units, respectively.

Stack package and method for selecting chip in stack package

Growing community of inventors

Gwangju-si, South Korea

Jae Hyun Son