Samsung Electronics Co., Ltd.

Honeywell International Inc.

Snu Rdb Foundation

Jae-Hwan Lee

Sang-Su Kim

Sangsu Kim

Tae-Jong Lee

Seung-mo Ha

Hwan-Wook Choi

Sang-Hoon Hur

Jung-dal Choi

Shigenobu Maeda

Seong-Ho Cho

Jung-han Lee

Je-Phil Ahn

Taeyong Kwon

David Seo

Mirco Cantoro

Sangjine Park

Young-Hun Kim

Yongsun Ko

Hyunsu Kim

Tae-yong Kwon

Dong-kyu Lee

Seung Mo Ha

Sanghyuk Hong

Sanghwa Lee

Kyoung-yong Lee

Jaeyoun Jeong

Chang-Jae Yang

Changjae Yang

Jeong-Ho Hong

Eun-O Kim

Jung-Rae Rho

Chan-Soo Shin

Jihye Son

Heon-Joong Kang

Woosang Lee

Seung-Bum Park

Bum-Sung Cho

Jun-Young Hong

Jeong-Ah Kim

Sang-Mi Oh

Kwangjo Lee

Moonbae Song

Gyu-Hyun Lim

Sang Su Nam

A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.

Semiconductor devices

A gas detection device comprises a pump module for drawing in air; a sensor module including a plurality of unit sensors detecting a gas included in the air; a driving module driving the pump module and the sensor module; and a case including a main body mounted to allow at least one among the pump module, the sensor module, and the driving module to be detachable and a cover connected to the main body to allow the at least one among the pump module, the sensor module, and the driving module to be exposed.

Gas detection device

An electronic device includes a housing, with a display exposed through a part of the housing. The housing includes a first motion sensor to detect movement of the housing, a wireless communication circuit, a processor, and a memory that stores instructions to be executed by a processor. The instructions include generating a wireless communication channel with an external electronic device including a second motion sensor; monitoring the movement of the housing to generate first data for a first time period; receiving second data for the first time period through the wireless communication channel; calculating, as a value for the first time period, a value, smaller than the sum of a first value based on the first data and a second value based on the second data; and displaying the calculated value through a user interface displayed on the display.

Method for integrating and providing collected data from multiple devices and electronic device for implementing same

FinFET semiconductor device with a dummy gate, first gate spacer and second gate spacer

A method of fabricating a semiconductor device includes forming an active pattern protruding from a substrate, forming a liner layer on the active pattern, forming a sacrificial gate pattern on the liner layer and crossing the active pattern, forming source/drain regions on the active pattern and at both sides of the sacrificial gate pattern, forming an interlayer insulating layer to cover the source/drain regions, forming capping insulating patterns on the interlayer insulating layer to expose the sacrificial gate pattern, and removing the sacrificial gate pattern and the liner layer by an etching process using the capping insulating patterns as an etch mask to form a gap region exposing the active pattern. The active pattern includes a material having a lattice constant greater than a lattice constant of the substrate, and the capping insulating patterns include a material having an etch selectivity with respect to the liner layer.

Method of fabricating semiconductor device

A method of providing a content in an electronic device is provided. The method includes include detecting a mapping event associated with a content of the electronic device, in response to detecting the mapping event, confirming the content, determining a contact point for mapping the content, and mapping the content to the contact point for mapping.

Method for providing content and electronic device thereof

A semiconductor device includes a fin structure on a substrate, device isolation patterns on the substrate at opposite sides of the fin structure, a gate electrode intersecting the fin structure and the device isolation patterns, a gate dielectric pattern between the gate electrode and the fin structure and between the gate electrode and the device isolation patterns, and gate spacers on opposite sidewalls of the gate electrode, wherein, on each of the device isolation patterns, a bottom surface of the gate dielectric pattern is at a higher level than bottom surfaces of the gate spacers.

Semiconductor devices including field effect transistors and methods of fabricating the same

Semiconductor devices and methods of manufacturing the same

A semiconductor device may include a strain relaxed buffer layer provided on a substrate to contain silicon germanium, a semiconductor pattern provided on the strain relaxed buffer layer to include a source region, a drain region, and a channel region connecting the source region with the drain region, and a gate electrode enclosing the channel region and extending between the substrate and the channel region. The source and drain regions may contain germanium at a concentration of 30 at % or higher.

Semiconductor device and method of fabricating the same

A MOSFET may be formed with a strain-inducing mismatch of lattice constants that improves carrier mobility. In exemplary embodiments a MOSFET includes a strain-inducing lattice constant mismatch that is not undermined by a recessing step. In some embodiments a source/drain pattern is grown without a recessing step, thereby avoiding problems associated with a recessing step. Alternatively, a recessing process may be performed in a way that does not expose top surfaces of a strain-relaxed buffer layer. A MOSFET device layer, such as a strain-relaxed buffer layer or a device isolation layer, is unaffected by a recessing step and, as a result, strain may be applied to a channel region without jeopardizing subsequent formation steps.

Field effect transistor and method of fabricating the same

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Seoul, South Korea

Jae-Hwan Lee