Samsung Electronics Co., Ltd.

Jae-hoon Kim

Jong-hyun Choi

Jun-Hyung Kim

Jung-ho Kim

Hyun-Soon Jang

Young-Gon Choi

Dong-Il Seo

Shubhranshu Singh

Chi-wook Kim

Han-gu Sohn

Yong-Sung Roh

Min-seok Kim

Ju-hyun Kim

Kyung-lim Kang

Hyo-Jin Oh

A resource management method of an electronic apparatus according to an example embodiment includes storing resource information including at least one resource category for assorting hardware resources and software resources by type and an attribute category indicating attribute information of resources included in the at least one resource category in a memory of the electronic apparatus, and in response to an application requesting a specific resource, allocating the specific resource to the application based on the resource information.

Electronic apparatus for effective resource management and method thereof

An ad-hoc network for routing extension by supporting the IPv6 protocol and a method for routing extension. The ad-hoc network comprises a gateway for appending an address configuration message to an ad-hoc Routing REPly (RREP) message and transmitting an extended ad-hoc RREP message; and a node for separating the address configuration message from the received extended ad-hoc RREP message, establishing a packet transmission path using the ad-hoc RREP message, and configuring a global address using the separated address configuration message. Accordingly, the present invention provides efficiency and improves the network scalability by utilizing the existing IPv6 protocol without amendments and reducing the size of the packet transmitted.

Ad-hoc network for routing extension to support internet protocol version 6(IPV6) and method thereof

Provided are a reference voltage generating circuit and an internal voltage generating circuit for controlling an internal voltage level, where the reference voltage generating circuit includes a distributing unit, a clamping control unit, and a control unit; the distributing unit has a voltage level lower than that of an external power supply voltage in response to the external power supply voltage, and outputs via an output terminal a reference voltage which varies according to an operating mode; the clamping control unit is connected between the output terminal and a ground voltage, and clamps the voltage level of the reference voltage at a constant level in response to a control voltage having a voltage level which is lower than that of the reference voltage; the control unit increases or decreases the voltage level of the reference voltage in response to first and second operating mode signals; the control unit includes a first control transistor and a second control transistor; and the reference voltage generating circuit controls a reference voltage level according to an operating mode of the semiconductor memory device such that the operating characteristics of the semiconductor memory device can be improved in some operating modes and power dissipation can be minimized in other operating modes.

Reference voltage generating circuit and internal voltage generating circuit for controlling internal voltage level

A peripheral circuit of a semiconductor device, including a circuit further including a plurality of electronic components using same source voltage, wherein the plurality of electronic components have gate oxides of different thicknesses. The plurality of electronic components may be for a delay chain, a directional delay and a power switch.

Semiconductor device having different thickness gate oxides

A semiconductor memory device and a failed cell address programming circuit usable therein. The semiconductor memory device as packaged includes a memory cell array having a plurality of memory cells accessed by an internal address, a plurality of redundant memory cells accessed by a failed cell address of a failed memory cell for repairing a failed memory cell, a comparator for comparing data output from the memory cells during testing the semiconductor memory device as packaged and generating a comparative correspondence signal, a mode setting register for storing an externally applied failed cell address programming control signal in response to a mode control signal, an address generating circuit for generating the internal address by buffering and latching an externally applied address, a failed cell address programming circuit for latching the internal address output from the address generating circuit in response to the failed cell address programming control signal when the comparative accordance signal indicates that a failed memory cell is detected and programming the failed cell address which is an address for accessing the failed memory cell; and a failed cell address decoding circuit for generating a redundant selection signal when the internal address output from the address generating circuit and the failed cell address output from the failed cell address programming correspond.

Failed cell address programming circuit and method for programming failed cell address

A semiconductor memory device which provides an improved operation performance in response to a relatively low external power voltage is included. The device comprises a plurality of direct-current voltage generating circuits for generating a plurality of direct-current voltages and a plurality of reference voltage generating circuits for generating reference voltages for the plurality of the direct-current voltage generating circuits, respectively.

Semiconductor memory device and voltage generating method thereof

A semiconductor memory device has a hierarchical or divided wordline structure wordline structure. Sub-wordline activation signals are arranged such that the number of sub-wordline drive units in memory blocks to which one sub-wordline activation signal is supplied is identical to that of sub-wordline drive units in memory blocks to which the other sub-wordline activation signal is supplied. Upon such sub-wordline activation signal arrangement, power consumption is not imbalanced when each of the sub-wordline activation signals has high level of a boosting voltage.

Growing community of inventors

Suwon, South Korea

Jae-hoon Kim