Samsung Electronics Co., Ltd.

Jae Ho Ahn

Sung-Min Hwang

Joon-Sung Lim

Ji Won Kim

Suk Kang Sung

Bum Kyu Kang

Sung Min Hwang

Joon Sung Lim

Sang Don Lee

A nonvolatile memory device including a mold structure including a plurality of gate electrodes on a substrate, the plurality of gate electrodes including first, second, and third string selection lines sequentially stacked on the substrate; a channel structure that penetrates the mold structure and intersects each of the gate electrodes; a first cutting region that cuts each of the gate electrodes; a second cutting region that is spaced apart from the first cutting region in a first direction and cuts each of the gate electrodes; a first cutting line that cuts the first string selection line between the first cutting region and the second cutting region; a second cutting line that cuts the second string selection line between the first cutting region and the second cutting region; and a third cutting line that cuts the third string selection line between the first cutting region and the second cutting region.

Nonvolatile memory device

A three-dimensional semiconductor device includes a first gate group on a lower structure and a second gate group on the first gate group. The first gate group includes first pad regions that are: (1) lowered in a first direction that is parallel to an upper surface of the lower structure and (2) raised in a second direction that is parallel to an upper surface of the lower structure and perpendicular to the first direction. The second gate group includes second pad regions that are sequentially raised in the first direction and raised in the second direction.

Three-dimensional semiconductor device

A nonvolatile memory device including a substrate extending in a first direction, a ground selection line extending in the first direction on the substrate, a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction, a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction, a rear contact plug connected to a lower face of the landing pad and extending in a second direction intersecting the first direction, a front contact plug connected to an upper face of the landing pad opposite the lower face and extending in the second direction, an input/output pad electrically connected to the rear contact plug, and an upper bonding pad electrically connected to the front contact plug and connected to at least a part of a plurality of circuit elements of the nonvolatile memory device.

Nonvolatile memory device, system including the same and method of fabricating the same

A semiconductor memory device comprising: a first semiconductor chip including an upper input/output pad, a second semiconductor chip including a lower input/output pad, and a substrate attachment film attaching the first and second semiconductor chips. The first and second semiconductor chips each include a first substrate including a first side facing the substrate attachment film and a second side, a mold structure including gate electrodes, a channel structure penetrating the mold structure and intersecting the gate electrodes, a second substrate including a third side facing the first side and a fourth side, a first circuit element on the third side of the second substrate, and a contact via penetrating the first substrate and connected to the first circuit element. The upper and lower input/output pads are on the second sides of the first and second semiconductor chip, respectively, and contact the contact vias of the first and second semiconductor chips.

Semiconductor memory device and electronic system including the same

A nonvolatile memory device includes an upper insulating layer. A first substrate is on the upper insulating layer. An upper interlayer insulating layer is on the first substrate. A plurality of word lines is stacked on the first substrate in a first direction and extends through a partial portion of the upper interlayer insulating layer. A lower interlayer insulating layer is on the upper interlayer insulating layer. A second substrate is on the lower interlayer insulating layer. A lower insulating layer is on the second substrate. A dummy pattern is composed of dummy material. The dummy pattern is disposed in a trench formed in at least one of the first and second substrates. The trench is formed on at least one of a surface where the upper insulating layer meets the first substrate, and a surface where the lower insulating layer meets the second substrate.

Nonvolatile memory device and method for fabricating the same

The nonvolatile memory device includes a substrate including a first surface and a second surface opposite to the first surface in a first direction; a common source line on the first surface of the substrate; a plurality of word lines stacked on the common source line; a first insulating pattern spaced apart from the plurality of word lines in a second direction crossing the first direction, and in the substrate; an insulating layer on the second surface of the substrate; a first contact plug penetrating the first insulating pattern and extending in the first direction; a second contact plug penetrating the insulating layer, extending in the first direction, and connected to the first contact plug; an upper bonding metal connected to the first contact plug and connected to a circuit element; and a first input/output pad connected to the second contact plug and electrically connected to the circuit element.

Nonvolatile memory device and nonvolatile memory system including the same

A semiconductor memory device includes a first substrate including opposite first and second surfaces, a mold structure including gate electrodes stacked on the first surface of the first substrate, a channel structure through the mold structure, a first contact via penetrating the first substrate, a second substrate including opposite third and fourth surfaces, a circuit element on the third surface of the second substrate, a first through-via through the mold structure connecting the first contact via and the circuit element, the first through-via including a first conductive pattern, and a first spacer separating the first conductive pattern from the mold structure, and a second through-via through the mold structure and spaced apart from the first through-via, the second through-via including a second conductive pattern, and a second spacer separating the second conductive pattern from the first substrate and the mold structure.

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Seoul, South Korea

Jae Ho Ahn