Samsung Electronics Co., Ltd.

Jae-gwon Jang

Baik-woo Lee

Young-jae Kim

Jong-Ho Lee

Jin-Woo Park

Eun-Seok Song

Dong-hun Lee

Young-lyong Kim

Chul-yong Jang

Seong-Ho Shin

In one embodiment, a magneto-resistive chip package includes a circuit board; a shielding body including a shielding base part positioned on the circuit board and a shielding intermediate part extending from one side of the shielding base part; a magneto-resistive chip positioned on the shielding base part and including a magneto-resistive cell array; an internal connection part electrically connecting the magneto-resistive chip to the circuit board; an encapsulation part encapsulating the magneto-resistive chip on the circuit board, and having an upper surface that is higher than an upper surface of the magneto-resistive chip; and a shielding cover positioned on the shielding intermediate part, and on the encapsulation part.

Magneto-resistive chip package including shielding structure

In one embodiment, a semiconductor device comprising, a substrate comprising a wiring layer, a first conductive shielding layer disposed on the substrate and electrically isolated from the wiring layer, the first conductive shielding layer comprising a first bonding surface and a first end surface extending from the first bonding surface, a semiconductor chip disposed on the first conductive shielding layer, a molding member disposed over the first conductive shielding layer to cover the semiconductor chip, a second conductive shielding layer disposed over the first conductive shielding layer and the molding member, the second conductive shielding layer comprising a second bonding surface and a second end surface extending from the second bonding surface, and a bonding portion disposed between the first and second bonding surfaces, the bonding portion comprising a top surface and a bottom surface opposite to the top surface. The bottom surface of the bonding portion contacts the first bonding surface to form a first contact surface. The top surface of the bonding portion contacts the second bonding surface to form a second contact surface. An area of the second contact surface is larger than an area of the second end surface.

Semiconductor device

Provided is a method of manufacturing a semiconductor package. The method includes mounting a semiconductor device on a substrate; disposing a mold on the substrate, wherein the mold is formed to cover the semiconductor device such that at least one inner side surface of the mold has a slope; providing a molding material into the mold to encapsulate the semiconductor device; removing the mold from the substrate; and forming an electromagnetic shielding (EMS) layer to cover a top surface and side surfaces of the molding material.

Semiconductor package and method of manufacturing the same

A method of manufacturing a semiconductor package having a magnetic shield function is provided. The method includes forming cracks in a lattice structure on an active surface in which electrode terminals are formed; grinding a back surface of a wafer facing the active surface, bonding a tape on the active surface of the wafer, expanding the tape such that the wafer on the tape is divided as semiconductor chips, forming a shield layer on surfaces of the semiconductor chips and the tape, cutting the shield layer between the semiconductor chips and individualizing as each of the semiconductor chips which has a first shield pattern formed on back surface and sides, bonding the semiconductor chips on a substrate, and forming a second shield pattern on each of the active surfaces of the semiconductor chips, wherein the semiconductor chips and the substrate are physically and electrically connected by a bonding wire.

Method of manufacturing semiconductor package having magnetic shield unit

A semiconductor package includes a master chip and a slave chip stacked on a substrate. The master chip and the slave chip are connected to one another by a bonding wire. The master chip and the slave chip are connected in series with an external circuit. The semiconductor package may have a low loading factor and excellent performance, and may be mass produced at low costs.

Growing community of inventors

Hwaseong-si, South Korea

Jae-gwon Jang