Tli Inc.

Jae Gan Ko

Ju Hyun Park

An organic light-emitting display (OLED) device includes an image display member, an aging display member, a degradation compensation control member for compensating for degradation of original image data of display pixels of the image display member. Aging pixels of the aging display member are degraded by reflecting image driving data of the display pixels, and the degradation of the original image data is compensated depending on degradation confirmation values of standard cumulative stress indexes corresponding to cumulative stress of the display pixels. The degree of degradation of the pixels may be accurately reflected while having a high aperture ratio, so that effective degradation compensation may be performed.

Organic light-emitting display device having degradation compensation

A mixing type pixel driving method in an active display device includes generating a digital data for a selected pixel, first driving the selected pixel to be illuminated with a first illumination intensity, and second driving the selected pixel to be illuminated with a second illumination intensity in a second illumination interval. A relative ratio of the second illumination intensity to the first illumination intensity is changed according to the value of the digital data. The number of the converted bits by DAC is reduced. Therefore, the less bit DAC is adaptable for the mixing type pixel driving method and the layout area and the consumption current can be decreased.

Active display device and mixing type pixel driving method in active display device

A clock embedded differential data receiving system for ternary lines differential signaling. The clock embedded differential data receiving system includes a monitoring portion which monitors voltage levels of first, second and third transfer signals to generate a clock signal, a first pre-data and a second pre-data, a data generating portion which detects the first pre-data and the second pre-data in response to a sampling control signal, and generates an output data group with decoding of the first pre-data and the second pre-data, and a timing controller to delay the transition time point of the clock signal with a delay phase which generates the sampling control signal.

Clock embedded differential data receiving system for ternary lines differential signaling

A voltage-controlled oscillator includes a plurality of variable delay circuits, wherein a first differential output signal of an adjacent previous stage is provided as a first differential input signal and a second differential output signal of a second previous stage is provided as a second differential input signal. Each variable delay circuit includes a loading circuit including first and second loading units, a first input circuit including first and second input transistors gated by the first differential input signal, a second input circuit including third and fourth input transistors gated by the second differential input signal, first and second current sources connected between a first common node and a second power source and in electrical parallel with each other, and third and fourth current sources connected between a second common node and the second power source and in electrical parallel with each other.

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Bucheon-si, South Korea

Jae Gan Ko