Stmicroelectronics S.a.

Sgs-thomson Microelectronics S.a.

Stmicroelectronics (grenoble 2) Sas

Stmicroelectronics (grenoble) Sas

Other

Jacques Meyer

Bruno Paille

A process receives a composite signal transmitted via a nonlinear data transmission channel, with the composite signal having a first signal UL and a second signal LL. The process includes the following: demodulating and decoding the first signal UL by using a first demodulation and decoding chain in order to regenerate first information of the first signal UL; recoding and shaping to produce a continuous time waveform; applying a nonlinearity function based on a set of coefficients updated according to an adaptive correlation calculation process to the continuous time waveform; subtracting the result of the nonlinearity function from the composite signal in order to generate a result E; and demodulating and decoding the result E by using a second demodulation and decoding chain in order to regenerate second information of the second signal LL.

Method for receiving two decorrelated signals transmitted on a single channel and receiver for implementing said method

A method for demodulating a modulated signal, by: receiving a signal modulated in n-PSK or n-APSK comprising a succession of symbols organized in frames, each frame comprising a header followed by blocks of data symbols separated by blocks of pilot symbols, determining the phase of the headers and pilot blocks to predict the evolution of the signal phase, correcting the phase of the data symbols according to the evolution of the signal phase, and equalizing the data symbols corrected in phase using equalization coefficients evaluated thanks to estimated or known symbols of the signal, and pre-equalizing the header, pilot and data symbols, which is performed before determining the phase of the headers and pilot blocks, and using the estimated equalization coefficients to equalize the data symbols.

DVB-S2 Demodulator

A method for receiving a signal having a succession of symbols, transmitted by a digital modulation, each symbol transmitted having a phase and an amplitude belonging to a set of values in finite number, the method includes evaluating a phase error (PHE) on a received symbol (S), resulting from a signal transmission noise, correcting the phase of the received symbol according to the phase error evaluated, demodulating the symbol corrected in phase, and modeling the transmission noise by a Gaussian component not correlated with the signal received and defined by a power and an interference component defined by an amplitude and which phase is substantially uniformly distributed, the phase error of the received symbol evaluated on the basis of the power of Gaussian component and the amplitude of the interference component.

Method and device for detecting a phase error of a signal

Processing method for modulated data transmitted in the form of multiplexed frames (Frame, . . . Frame) containing symbols that have a symbol frequency. The method comprises a frame selection processing operation performed at least partly at a working frequency below the symbol frequency, and a demodulation processing operation comprising at least a part performed at the working frequency on the selected frames.

Demodulator for high bit rate transmission and corresponding demodulation method

A method for searching a digital transmission having unknown carrier and symbol frequencies in a modulated reception signal, includes performing successive trials of several carrier and symbol frequencies, using decreasing values of the symbol frequency, demodulating the reception signal with the tried carrier frequency, filtering the demodulated signal in a band having a width corresponding to the currently tried symbol frequency, and producing samples of the filtered signal. For each currently tried symbol frequency, forming a complex indicator having a real component and an imaginary component established from the successive samples of the filtered signal such that they have cyclostationary properties and that one of the components tends to cancel when the other component tends towards a relative maximum, building the spectrum of the variation of the complex indicator, searching for a singular spike in the spectrum, and determining the real symbol frequency from the frequency of the spike.

Fast blind channel search

A method and a circuit for determining the frame header of a signal that can be applied to standard DVBS2.

Method and device for decoding a signal

A method and a device for estimating a first value of a signal formed of a series of values corresponding either to the first value or to a second value equal to the opposite of the first value, where the signal can take values other than the first and second values due to noise.

Estimating of the amplitude of a noisy binary signal

A method and a circuit for decoding a coded signal including a first decoding system capable of receiving the coded signal and of providing a first signal comprising portions considered correct and a second decoding system capable of providing a second signal from the coded signal and from portions considered correct of the first signal.

Receive circuit

A method and a device for determining, in a signal, a value of the frequency of a carrier and a value of the frequency of symbols carried by the carrier. A band of the signal is analyzed at three points and the relations between the powers at these points enable determining values of the carrier frequency and of the symbol frequency.

Determination of carrier and symbol frequencies in a signal

A process of correction of the spectral inversion for a receiver in a digital communication system: the process allows the reception in the receiver of a training sequence presumably known according to a modulation of type &#x3c0;/2 BPSK or MDP2. The process includes the following steps: Demodulating of the training sequence; Calculating of the differential correlation on a set of N received samples (R) and presumably sent (S) to generate a result; Using the result to detect the beginning of the frame and to order a spectral inversion in the chain of reception of the aforementioned receiver before launching the detection of the beginning of the frame. A receiver to process automatically the spectral inversion is also described.

Process for automatic correction of the spectral inversion in a demodulator and device to implement the process

A device for providing a digital error signal, for a timing correction loop of a digital demodulator for digital transmission by phase modulation or amplitude and phase modulation, the device successively receiving pairs of digital signals representative of the components of complex signals, and having circuitry for providing a difference signal representative of the difference between the modulus of the complex signal corresponding to the last received pair of digital signals and the modulus of the complex signal corresponding to the previously-received pair of digital signals; circuitry for providing a weighting factor which depends on the angle between the complex signal corresponding to the last received pair of digital signals and the complex signal corresponding to the previously-received pair of digital signals; and circuitry for providing the error signal proportional to the product of the difference signal and of the weighting factor.

Device for estimating a timing correction loop error for a digital demodulator

The invention concerns a data transmission device comprising a turbo coder () comprising an interleaver operating on two interleaving blocks and means () for producing symbols from said codes (D, Y, Y) supplied by the turbo coder The device comprises means () for inserting a synchronising sequence into said symbols at a site having a predetermined relationship position relative to the symbols produced with the codes associated with a common interleaving block.

Turbocoder with facilitated synchronization

A COFDM demodulator including a fast Fourier transform circuit analyzing a received signal in a window corresponding to one symbol, each symbol carrying several phase and amplitude modulated carriers, some of which are shifted in frequency in a predetermined way from one symbol to the next one to form pilots; a bidimensional filter for interpolating, from anchors corresponding to the pilots such as received from several consecutive symbols, the distortion undergone by each carrier; and a circuit for correcting the shifting of the window with respect to an optimal position. The demodulator includes a circuit for correcting each distortion according to window shifting corrections performed respectively for the symbol associated with the distortion and for the symbols associated with the anchors used to interpolate the distortion.

COFDM demodulator with FFT analysis window displacement compensation

A demodulation circuit for demodulating a received signal including carriers in quadrature modulated by digital signals and/or in which the processing is performed on two carriers in quadrature. The circuit includes a demodulator, an analog-to-digital converter, a correcting circuit, and a derotator. The correcting circuit provides signals to the derotator based on the derotator output signals and on signals provided by the analog-to-digital converter.

High-efficiency circuit for demodulating carriers in quadrature

A method for detecting the lock-in of a loop that synchronizes an internal clock on the transmission of value pairs provided by a demodulator. According to the method, a module of a vector that has as components the values of one of the value pairs is calculated, and the module is compared with a threshold that is smaller than a theoretical module. The locked-in condition is determined according to the ratio of the number of modules found to be greater than or smaller than the threshold to the total number of modules. In one preferred method, the threshold is incremented by a first value if the module is greater than the threshold and is decremented by a second value if the module is less than the threshold. A lock-in detection circuit for detecting the lock-in of a loop is also provided. A calculation circuit calculates a module of a vector that has as components the values of one of the value pairs. A register stores a threshold and a comparator compares the stored threshold with the calculated module. A modification circuit modifies the stored threshold based on the comparison result, and an analysis circuit analyzes the stored threshold to determine the locked-in condition.

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Corenc, France

Jacques Meyer