Intel Corporation

Jacob Subag

Yaniv Fais

Lev Faivishevsky

Tomer Bar-On

Jeremie Dreyfuss

Amit Bleiweiss

Tomer Schwartz

Uzi Sarel

Amitai Armon

Gal Leibovich

Ehud Cohen

Michael Behar

Yahav Shadmiy

Guy Jacob

Itamar Ben-Ari

Galina Ryvchin

Eran Ben-Avi

Neta Zmora

Eyal Yaacoby

Raanan Yonatan Yehezkel Rohekar

Gal Novik

Zigi Walter

Orly Weisel

Shira Hirsch

Yarden Oren

Tatiana Surazhsky

Nir Benty

Amital Armon

In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to receive a plurality of data inputs for training a neural network, wherein the data inputs comprise training data and weights inputs; represent the data inputs in a first form; and represent the weight inputs in a second form. Other embodiments are also disclosed and claimed.

Real time context dependent deep learning

In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

Low rank matrix compression

In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to traverse a solution space, score a plurality of solutions to a scheduling deep learning network execution, and select a preferred solution from the plurality of solutions to implement the deep learning network. Other embodiments are also disclosed and claimed.

Scheduling configuration for deep learning networks

In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to expose embedded cast operations in at least one of a load instruction or a store instruction; determine a target precision level for the cast operations; and load the cast operations at the target precision level. Other embodiments are also disclosed and claimed.

Variable precision and mix type representation of multiple layers in a network

A mechanism is described for facilitating memory handling and data management in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting multiple tables associated with multiple neural networks at multiple autonomous machines, where each of the multiple tables include an index. The method may further include combining the multiple tables and multiple indexes associated with the multiple tables into a single table and a single index, respectively, where the single table is communicated to the multiple autonomous machines to allow simultaneous processing of one or more portions of the single table using one or more memory devices and one or more processors of one or more of the multiple autonomous machines.

Smart memory handling and data management for machine learning networks

In an example, an apparatus comprises logic, at least partially including hardware logic, to save one or more outputs of a deep learning neural network in a storage system of an autonomous vehicle and upload the one or more outputs to a remote server. Other embodiments are also disclosed and claimed.

Storage system of DNN outputs for black box

In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to gate at least one of a multiply unit or an accumulate unit in response to an input of value zero. Other embodiments are also disclosed and claimed.

Multiply-accumulate '0' data gating

In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer.

In an example, an apparatus comprises a plurality of execution units; and logic, at least partially including hardware logic, to determine a sub-graph of a network that can be executed in a frequency domain and apply computations in the sub-graph in the frequency domain. Other embodiments are also disclosed and claimed.

Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU

Growing community of inventors

Kiryat Haim, Israel

Jacob Subag