Microchip Technology Inc.

Atmel Corporation

Jacob Lunn Lassen

Morten Werner Lund

An electrical system includes an integrated circuit device including input/output (I/O) pins, a reset circuit, and an I/O circuit. The I/O circuit is operably coupled to the I/O pins. The I/O circuit is configured to selectively operate the I/O pins in an electrically floating state responsive to a system reset signal transmitted by the reset circuit. The I/O circuit is further configured to selectively operate the I/O pins in the electrically floating state responsive to a signal provided by a timer circuit independently from the reset circuit.

Timer circuit with autonomous floating of pins and related systems, methods, and devices

Waveform circuitry and related apparatuses and methods are disclosed. An apparatus includes a memory device to store waveform data corresponding to a waveform, a processor, and a waveform circuitry to autonomously pre-process the waveform data independently from the processor and provide the pre-processed waveform data to one or more peripheral devices. A pre-processed waveform corresponding to the pre-processed waveform is data different from the waveform.

Pre-processing of waveform data using autonomous waveform circuitry and related apparatuses and methods

Trap sub-portions of computer-readable instructions and related systems, methods, and devices are disclosed. A processing circuit includes a processing core including a program counter to cycle through addresses and a data storage device including computer-readable instructions stored thereon. Sub-portions of the computer-readable correspond to subroutines. Locations of the sub-portions within the data storage device are associated with the addresses. A first sub-portion at a first location within the data storage device is indicated by a first address. First trap sub-portions at first trap locations are indicated by first trap addresses. The first trap addresses are different from the first address by only a single bit. The first trap sub-portions instruct the processing core to execute first trap subroutines to jump to the first address or back to themselves.

Trap sub-portions of computer-readable instructions and related systems, methods, and apparatuses

Autonomous memory access (AMA) controllers and related systems, methods, and devices are disclosed. An AMA controller includes waveform circuitry configured to autonomously retrieve waveform data stored in a memory device and pre-process the waveform data without intervention from a processor. The AMA controller is configured to provide the pre-processed waveform data to one or more peripheral devices.

Pre-processing of data using autonomous memory access and related systems, methods, and devices

An updated process parameter to an autonomous process control peripheral is autonomously obtained when made available by a process monitor peripheral, such as an analog-to-digital converter (ADC). The input can be obtained in response to a system event, such as a completed ADC conversion. The autonomous process control peripheral can compute an updated control variable each time the process variable is updated. When the updated control variable is calculated by the autonomous process control peripheral, the updated control variable is autonomously transferred or otherwise made available (e.g., through a register) by the autonomous process control peripheral to a process actuate peripheral. The process actuate peripheral uses the updated control variable to adjust the process being controlled.

Autonomous process control peripheral

Disclosed systems, methods and devices relate, generally, to autonomous signal processing and autonomous signal processing units of a microcontroller. The autonomous data processing units may be configured to perform one or more functions independently, without input from a processing unit of the microcontroller, and may, monitor and/or perform operations that are part of one or more control loops that operate independent of the microcontroller processor. The control loops may or may not be in support of control loops monitored by the processor of the microcontroller.

Analog-to-digital converter with autonomous gain stage and auto scaling, and related systems and methods

An autonomous circular buffer is described in connection with the various embodiments of the present disclosure. An autonomous circular buffer controller may control movement of data between a user of the autonomous circular buffer and a peripheral. The autonomous circular buffer may enable direct memory access type data movement, including between the user and the peripheral.

Devices and methods for autonomous hardware management of circular buffers

Embodiments of the disclosure relate to an analog-to-digital converter (ADC) with gain adjustment. One embodiment of an ADC with autonomous gain adjustment includes an ADC, a gain stage coupled to the ADC, a scaler coupled to the ADC, and a control logic that may be configured to configure the gain of the gain stage responsive to measured output of the ADC.

A motor control system for a two-phase brushless DC motor uses measured EMF voltage from the passive set of stator coils to control commutation. A microcontroller receives the EMF voltage measurement and compares it to a threshold voltage value, which may be speed-dependent for advance commutation at high motor speeds. A match of the EMF voltage measurement with the threshold value triggers commutation of the drive to the opposite set of stator coils. The microcontroller also has an up-down counter timer whose count value is compared to an external speed reference. Each match of the count value triggers a transition in a pulse-width modulated (PWM) drive signal. The duty cycle of the PWM signal establishes an average drive voltage that controls motor speed.

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Saupstad, Norway

Jacob Lunn Lassen