Freescale Semiconductor,inc.

Freescale Semiconductors Inc.

Jacob Efrat

Moshe Anschel

Itay S Peled

Uri Dayan

Yakov Tokar

Alon Eldar

Moshe Bachar

Avraham Horn

Ziv Zamsky

Amit Gur

Doron Schupper

Zvika Rozenshein

Itay Peled

A method for fetching information in response to hazard indication information, the method includes: (i) associating hazard indication information to at least one information unit that is being fetched to the cache module; (ii) receiving a request to perform a fetch operation; and (iii) determining whether to fetch at least one information unit to the cache module in response to the hazard indication information and in response to dirty information associated with the at least one information unit.

System and method for fetching information in response to hazard indication information

A virtual address cache and a method for sharing data. The virtual address cache includes: a memory, adapted to store virtual addresses, task identifiers and data associated with the virtual addresses and the task identifiers; and a comparator, connected to the memory, adapted to determine that data associated with a received virtual address and a received task identifier is stored in the memory if at least a portion of the received virtual address equals at least a corresponding portion of a certain stored virtual address and a stored task identifier associated with the certain stored virtual address indicates that the data is shared between multiple tasks. The method includes: receiving a virtual address and a task identifier for addressing data; determining as to whether the data is stored in a memory based upon a comparison of at least a portion of the received virtual address with at least a portion of an address associated with data stored in memory and based upon a fulfillment of the following criterion: a stored task identifier associated with the certain stored virtual address indicates that the data is shared between multiple tasks.

Virtual address cache and method for sharing data using a unique task identifier

A memory management unit that includes: (i) multiple data segment descriptors, each data segment descriptor associated with a data memory segment; (ii) multiple program segment descriptors, each program segment descriptor associated with a program memory segment; and (iii) a controller, adapted to replace the content of the multiple data segment descriptors and the multiple program segment descriptors in response to a task switch. A method for memory management, the method includes: (i) providing multiple data segment descriptors; each data segment descriptor associated with a data memory segment, and providing multiple program segment descriptors, each program segment descriptor associated with a program memory segment; (ii) receiving and storing a program task identifier and a data task identifier; (iii) receiving a data access request and determining how to handle the data access request in response to a content of the multiple data segment descriptors; and (iv) receiving a program access request and determining how to handle the program access request in response to a content of the multiple program segment descriptors.

Descriptor-based memory management unit and method for memory management

A method and apparatus non-intrusive tracing. The method includes: counting selected events by multiple counters; sampling the multiple counters to retrieve multiple counter values in response to predefined triggering events; receiving additional trace information that comprises at least one program counter value, and outputting, as a trace information, at least one of the multiple counters values and the additional trace information.

Method and apparatus for non-intrusive tracing

A processing system has a processor, a cache, and a fetch unit. If there is a miss in the cache, the fetch unit generates a fetch address for the miss in the cache for the purpose of retrieving the requested data from external memory and providing the data to the processor and loading the data in a location in a line in the cache. The fetch unit also generates additional prefetch addresses for addresses consecutive with the fetch address. The prefetch addresses continue to be generated for all of the locations in the line in the cache that are consecutive with the fetch address. The generation of prefetch addresses will be stopped if another requests arrives that is not part of the already generated prefetched addresses. Further, the outstanding prefetches will be terminated if the external memory can handle such termination.

Method and apparatus for filling lines in a cache

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Kfar-Saba, Israel

Jacob Efrat