Avago Technologies International Sales Pte. Limited

Jack Regula

Shreyas Shah

Nagarajan Subramaniyan

Jeffrey S Earl

George Apostol, Jr

Described herein are systems, methods, and products utilizing a cache coherent switch on chip. The cache coherent switch on chip may utilize Compute Express Link (CXL) interconnect open standard and allow for multi-host access and the sharing of resources. The cache coherent switch on chip provides for resource sharing between components while independent of a system processor, removing the system processor as a bottleneck. Cache coherent switch on chip may further allow for cache coherency between various different components. Thus, for example, memories, accelerators, and/or other components within the disclose systems may each maintain caches, and the systems and techniques described herein allow for cache coherency between the different components of the system with minimal latency.

Composable infrastructure enabled by heterogeneous architecture, delivered by CXL based cached switch SOC and extensible via cxloverethernet (COE) protocols

Heterogeneous architecture, delivered by cxl based cached switch SOC and extensible via cxloverethernet (COE) protocols

Composable infrastructure enabled by heterogeneous architecture, delivered by CXL based cached switch SOC

Composable infrastructure enabled by heterogeneous architecture, delivered by CXL based cached switch SoC

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Durham, NC, United States of America

Jack Regula