Motorola Corporation

Jack L Anderson

Lee Silverthorn

Thomas J Balph

Marvin A Glazer

Frank J Swiatowiecz

A system is shown to improve data transfer between computers and PC Cards, which have a Host Bus Adapter (HBA). Previous HBA designs are limited in routing interrupts to the system and transferring data. The Smart HBA (150) detects an interrupt, alerts a target controller of the interrupt and provides a vector to the PC Card driver. This also eliminates acknowledgment routines and saves bus cycles. To each PC Card it appears that it is interfacing directly to its software driver. The command handling feature allows bus agents to communicate between fast access devices without using Peripheral Component Interconnect (PCI) commands that cannot be posted. Thus all commands can be posted in PCI bridges, no bus accesses have to wait for arbitration across multiple busses and no slow devices require a retry. Direct memory access (DMA) operations can be performed by legacy PC Cards when connected to a PCI bus.

Apparatus and method for smart host bus adapter for personal computer

An interface device to provide a data and address path between a data processor, a memory and peripheral devices. The interface device includes an internal arithmetic and logic unit to provide a means for generating and/or modifying addresses for the memory or peripheral devices. The device further includes a plurality of registers for temporarily storing data or addresses as well as information associated with addressing functions, for example, program counter, index register, stack pointer and page addresses. The interface device may be used singly or in combination with like devices as in a slice processing system.

Memory interface device with processing capability

An adder provides either binary or binary coded decimal operation under the selection of a control input. The data inputs are a pair of four bit operands and a carry in for providing an additional capability of greater than four bits. Outputs, in addition to the four bit result, include carry propagate and carry generate signals for the four bit group. Binary operation is conventional. For binary coded decimal operation, the adder corrects an initial binary result to the binary coded decimal format by adding six when there is a group carry generate signal present thus forming an intermediate result. This intermediate result is formed before the occurrence of the carry in from a preceding stage. In the final stage of the adder, the intermediate result is incremented to form the final four bit result if there is a carry in.

Binary or BCD adder with precorrected result

A dual function capability is incorporated into one input of an emitter coupled logic gate to allow a user to selectively enable the logic circuit to operate in a multifunction mode. The dual function input can recognize both normal binary voltage levels and operate as a conventional input for digital information, and also recognize voltage levels not within the normal binary voltage levels and modify the circuit function correspondingly.

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Scottsdale, AZ, United States of America

Jack L Anderson