Taiwan Semiconductor Manufacturing Comp. Ltd.

Jack Kuo-Ping Kuo

Sheng-Liang Pan

Jyu-Horng Shieh

Shu-Huei Suen

Chia-Yang Hung

Syun-Ming Jang Jang

Bing-Hung Chen

Mei-Yun Wang

Fu-Kai Yang

Huan-Just Lin

Kuo-Yi Chao

Chao-Hsun Wang

Chen-Yuan Kao

Yu-Feng Yin

Feng-Yu Chang

Shao-Jyun Wu

Chia-Sheng Chang

Pang-Sheng Chang

Yun-Chang Hsu

Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.

DC bias in plasma process

A method of manufacturing a semiconductor device includes etching a via through a dielectric layer and an etch stop layer (ESL) to a source/drain contact, forming a recess in the top surface of the source/drain contact such that the top surface of the source/drain contact is concave, and forming an oxide liner on the sidewalls of the via. The oxide liner traps impurities left behind by the etching of the via through the dielectric layer and the ESL, wherein the etching, the forming the recess, and the forming the oxide liner are performed in a first chamber. The method further includes performing a pre-cleaning that removes the oxide liner and depositing a metal in the via.

Layer for side wall passivation

A method includes forming a metal gate structure, wherein the metal gate structure includes a gate dielectric layer and a gate electrode; performing a surface treatment to a top surface of the metal gate structure, wherein the surface treatment converts a top portion of the gate electrode to an oxidation layer; forming a conductive layer above the gate electrode, wherein the forming of the conductive layer includes substituting oxygen in the oxidation layer with a metallic element; and forming a contact feature above the metal gate structure, wherein the contact feature is in direct contact with the conductive layer.

Metal contacts on metal gates and methods thereof

An ashing process and device forms radicals of an ashing gas through a secondary reaction. A plasma is generated from a first gas, which is diffused through a first gas distribution plate (GDP). The plasma is diffused through a second GDP and a second gas is supplied below the second GDP. The first gas reacts with the second gas to energize the second gas. The energized second gas is used in ashing a resist layer from a substrate.

Dry ashing by secondary excitation

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Pleasanton, CA, United States of America

Jack Kuo-Ping Kuo