Cypress Semiconductor Corporation

Jacek Dobaczewski

Victor Simileysky

Roman Baker

Yun-Lu Chen

Kuo-Jui Sun

One or more computing devices, systems, and/or methods are provided. In an example, a method comprises storing an application image comprising a non-secure portion in a memory. A first debug request comprising a first target address is received. Halting of a processor is inhibited responsive to the first target address being within a protected region for a portion of non-secure code.

System and method for inhibiting debugger in non-secure region

One or more computing devices, systems, and/or methods are provided. In an example of the techniques presented herein, a system comprises a processor, a first interrupt source configured to generate a first non-secure interrupt, and an interrupt blocking unit configured to block the first non-secure interrupt responsive to the processor operating in a secure state.

System and method for blocking non-secure interrupts

Systems, methods, and devices authenticate operations for secured execution environments. Methods include performing, using one or more processing elements of a secured execution environment, a first cryptographic computation on a portion of code to generate a result. Methods also include determining, using the one or more processing elements, an authenticated version of a cryptographic value, the authenticated version of the cryptographic value being determined based on a signature computation and a second cryptographic computation that is an asymmetric cryptographic computation. Methods further include determining, using the one or more processing elements, if the result of the first cryptographic computation is verified based, at least in part, on a comparison with the authenticated version of the cryptographic value.

Systems, methods, and devices for security attribute caching and accelerated wake times of secured environments

One or more computing devices, systems, and/or methods are provided. In an example, a method comprises storing a first application image and a second application image in an application image memory, designating the first application image as active, receiving a first address for accessing the application image memory from a processor, modifying the first address based on a first offset between a base starting address of the first application image and a starting physical address of the first application image in the application image memory to generate a second address, and accessing the application image memory using the second address.

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San Jose, CA, United States of America

Jacek Dobaczewski