Exar Corporation

J Antonio Salcedo

Bhupendra K Ahuja

Richard Leigh Gower

Charles Andrew Rogers

Tore Lennart Kellgren

Raphael Horton

Eric Glen Hoffman

Logic to indicate a revision level includes multiple cells for one bit of the revision level. The cells being wired to be a pass-through cell or a swap cell during fabrication. At least some of the cells are such that to change the bit of the revision level, it is sufficient to change any single mask of a group of masks. The change to the single mask switches at least one of the cells from pass-through cell to a swap cell, or vice-versa.

Methodology for storing and updating on-chip revision level

A programmable gain amplifier having three separately programmable amplifiers. A programmable transconductance amplifier is followed by a programmable transimpedance amplifier, then a programmable switched capacitor amplifier. In one embodiment, this programmable gain amplifier is implemented in an analog front-end (AFE) circuit. One AFE embodiment provides a coarse pre-gain offset a black reference level sampler, and a fine post-gain offset in the programmable switched capacitor amplifier. In one embodiment, an ADC reference is sampled, and is subtracted directly from the video signal in the switched capacitor amplifier so that the zero level of the video signal is made to correspond to the zero level of the ADC. In another embodiment, a piece-wise linear approximation of an exponential gain function is implemented by programming the transconductance and transimpedance amplifiers to provide exponential jumps in gain, while the switched capacitor amplifier is programmed to interpolate as needed between the exponential gain levels.

Image sampling circuit with a blank reference combined with the video input

A method and circuitry for implementing programmable gain. More particularly, embodiments of the present invention provide an amplifier circuit which can be used as a CDS-amp or an instrumentation amplifier. Included is a two-stage amplifier, each stage having a few as one transistor. A current source biases one stage of the two-stage amplifier. A load resistor network couples to the two-stage amplifier and is configured to set gain values for the two-stage amplifier.

Low power wide bandwidth programmable gain CDS amplifier/instrumentation amplifier

A programmable delay in an AFE of an imaging system which can vary both the pulse position and the pulse width. The pulse width and position are controlled by providing separate programmable delay circuits for the rising and falling edges of the desired timing signal. Combining logic then combines the outputs of the two delay circuits to produce an output clock with separately delayed rising and falling edges.

Growing community of inventors

Livermore, CA, United States of America

J Antonio Salcedo