Shinko Electric Industries Co., Ltd.

Izumi Tanaka

Yuji Yukiiri

Natsuko Kitajo

A laminated structure includes an interconnect structure including first and second product areas and a first interconnect layer, and a first insulating layer formed on the interconnect structure. The first product area includes an opening penetrating the first insulating layer, and the second product area includes an annular groove penetrating the first insulating layer. The laminated structure further includes an electronic component mounted inside the opening in the first product area with an annular gap formed between the electronic component and a wall surface defining the opening, an insulating member located inside the groove in the second product area, a second insulating layer that fills the annular gap and the groove, and covers the first insulating layer, the electronic component, and the insulating member, and a second interconnect layer formed on the second insulating layer, and electrically connected to the first interconnect layer.

Laminated structure

A wiring substrate includes a pad, an insulation layer that covers the pad, and a via wiring extending through the insulation layer and connected to the pad. The via wiring includes a first via portion, which has a diameter that is decreased from an upper surface of the insulation layer toward the pad, and a second via portion, which has a diameter that is increased from a lower end of the first via portion toward the pad. The diameter of the second via portion at an upper surface of the pad is larger than the diameter of the first via portion at the upper surface of the insulation layer.

Wiring substrate

A wiring substrate includes first through holes extending through an insulation layer, first via wirings formed in the first through holes, a conductive pattern connected to the first via wirings, recesses formed in the first via wirings, and a protective insulation layer covering the conductive pattern and the first via wirings. The first via wirings, the conductive pattern, the recesses, and the protective insulation layer form an identification mark identifiable as a particular shape including a character or a symbol. Each recess is defined by an upper surface of the corresponding first via wiring and includes a curved side wall and a bottom wall that is located at a lower position than an upper surface of the conductive pattern. The protective insulation layer is thicker over the first via wirings than over the conductive pattern.

Wiring substrate and semiconductor device

There is prepared an insulation layer generation member having a support film and a semi-cured insulation layer provided on a surface of the support film. Subsequently, the insulation layer generation member is affixed to a pad such that the pad contacts the semi-cured insulation layer. The semi-cured insulation layer is cured, to thus generate an insulation layer. Subsequently, the insulation layer is exposed to laser by way of the support film, thereby opening an opening in the insulation layer.

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Nagano, Japan

Izumi Tanaka