Tektronix, Inc.

Iwao Akiyama

Steven K Sullivan

Yasumasa Fujisawa

Raymond L Veith

Yukio Aizawa

A DDS pulse generator has an accumulator that accumulates a phase increment value to produce phase accumulator values, and has a lookup table that contains a digital representation of a pulse waveform such that a pulse output signal is produced from the lookup table in response to the phase accumulator values. To change a period of the pulse output signal without changing edge positions a programmable modulo value is used. An address mapper is situated between the accumulator and address lines of the lookup table to map the rising and falling edge portions of the phase accumulator values into large regions of the lookup table, while phase accumulator values corresponding to high and low logic levels are mapped into small regions of the lookup table. The resulting pulse output signal has easily independently controlled period and pulse width as well as rising and falling edge speeds. By making better use of the lookup table it is possible to generate very narrow pulses with low repetition rates or pulses in which the rise time and fall time are very different from the period.

DDS pulse generator architecture

A triggered DDS generator architecture accumulates a phase increment value in response to a DDS clock to generate phase accumulator values for addressing a waveform lookup table which contains a desired output signal. A time measurement circuit determines a time interval between the arrival of a trigger signal and a subsequent cycle of the DDS clock, which time interval is used to either adjust an initial phase accumulator value or delay the DDS clock so that a constant time is maintained between the arrival of the trigger signal and the desired output signal.

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Shizuoka, Japan

Iwao Akiyama