Thomson Licensing

Thomson Licensing S.a.

Heo, Seo Weon

Ivonete Markman

Gabriel Alfred Edde

Seo Weon Heo

Saul Brian Gelfand

Jeongsoon Park

Richard W Citta

Weixiao Liu

Wen Gao

Max Ward Muterspaugh

Vasudevan Parthasarathy

Aaron Reel Bouillet

Matthew Thomas Mayer

Jaehyeong Kim

Scott Matthew Lopresto

John Sydney Stewart

A digital data stream comprises alternating groups of information blocks and groups of parity blocks, each group of information blocks includes multiple information blocks and each group of parity blocks includes multiple parity blocks. An apparatus for receiving a digital data stream comprises a demodulator that receives and demodulates a digital data stream. An equalizer compensates for distortions in the digital data stream. A delay buffer generates a first stream of digital data representing the compensated digital data stream and a second stream of digital data representing a delayed version of the compensated digital data stream. A forward error correction block receives and processes the first and second streams of digital data from the delay buffer, and outputs an error corrected stream of digital data. A transport block receives and processes the error corrected stream from the forward error correction block for display.

Reliable diversity architecture for a mobile DTV system

A joint preamble and code rate identifier flag in a reserved portion of a data field synchronization segment in a digital television (DTV) data field identifies the presence of preamble training data in a forward error correction (FEC) encoded portion of the DTV data field. The identifier flag also indicates the code rate used for the data field. The data field synchronization segment is not FEC encoded, thereby allowing detection of the identifier flag without FEC decoding. The detection at a receiver of the identifier flag in a DTV data field allows receiver elements, such as an equalizer and a FEC decoder, to more readily obtain and utilize the preamble training data, thereby enhancing reception and/or simplifying receiver design.

Joint preamble and code rate identifier in a mobile DTV system

A preamble identifier flag in a reserved portion of a data field synchronization segment in a digital television (DTV) data field identifies the presence of preamble training data in a forward error correction (FEC) encoded portion of the DTV data field. The data field synchronization segment is not FEC encoded, thereby allowing detection of the preamble identifier flag without FEC decoding. The detection at a receiver of the preamble identifier flag in a DTV data field allows receiver elements, such as an equalizer and a FEC decoder, to more readily obtain and utilize the preamble training data, thereby enhancing reception and/or simplifying receiver design.

Preamble identification in a mobile DTV system

An apparatus for decoding digital data includes a processor for recreating a priori training information received with the digital data for provision to a maximum a posteriori (MAP) decoder. The processor detects locations of symbols in the input data stream and regenerates data corresponding to each location. The regenerated data is used by the processor to recreate a priori information suitable to each location of the input data stream location and provides the recreated a priori information to the MAP decoder to aid in the decoding of the digital data. In a preferred implementation, the a priori training data is structured so that after deterministic processing and trellis encoding at the transmitter, it can be regenerated by the processor as a pseudo noise (PN) sequence using a PN sequence generator.

Priori training in a mobile DTV system

An apparatus for processing a first and a second stream of digital data includes a stagger multiplexer and a stagger demultiplexer. Each stream of digital data includes data blocks. The stagger multiplexer processes the first and the second streams of digital data concurrently to output a combined stream of digital data. The stagger demultiplexer processes the combined stream of digital data to output a first and a second stream of extrinsic digital data.

Data block processor in a mobile DTV system with diversity

Communication systems for broadcasting data often include the ability to combine and transmit more than one type or format of data. A method includes receiving a packet of data, determining a location for a parity byte, the location based on a characteristic of the packet of data, decoding the data to determine a value for the parity byte, and outputting a coded packet of data. An apparatus includes a first signal processor for receiving a first data signal and a second data signal, combining the signals, and creating a signal identifying the signals. The apparatus also includes a second signal processor for encoding the combined signal using a decoding algorithm to generate Reed-Solomon parity bytes in locations within the combined signal based on the identifying signal.

Method and apparatus for encoding a signal

A Wireless Regional Area Network (WRAN) receiver comprises a transceiver for communicating with a wireless network over one of a number of channels, and an Advanced Television Systems Committee (ATSC) signal detector for use in forming a supported channel list comprising those ones of the number of channels upon which an ATSC signal was not detected, wherein the ATSC signal detector is a threshold-based detector and detects an ATSC signal as a function of at least one threshold, and wherein the ATSC signal detector is responsive to at least one of a carrier tracking loop lock signal, a symbol timing recovery lock signal and a synchronization (sync) lock signal.

Digital detector for ATSC digital television signals

A decision feedback equalizer for processing a data signal provides concurrent equalizer outputs (Z, Z) for hard decision directed and soft decision directed modes. The joint architecture in accordance with the present invention takes advantage of the fact, herein recognized, that for each equalizer output symbol soft decision bit representation, a subset of these bits corresponds to the hard decision representation. As a result, the invention permits the concurrent output of two distinct modes with essentially the same hardware as a one output equalizer.

Dual-mode equalizer in an ATSC-DTV receiver

A method and apparatus for decoding received digital data representing video, audio, information or a combination thereof. After a forward error correction (FEC) frame sync lock is detected, a counter is incremented corresponding to the number of identical control words decoded from the received data. If the number of identical control words is above a threshold value, the control word is used to operate the decoder in a mode corresponding to the control word. Otherwise, the system repeats the operation of determining whether a FEC frame sync lock is detected.

Interleaver mode detection in a digital video receiver

A phase tracking system includes a source of an input signal representing a received symbol. A phase rotator has a first input terminal which is responsive to the input signal, a second input terminal which is responsive to a phase correction signal, and an output terminal which produces a phase adjusted output signal. A decision element generates an ideal signal representing the received symbol in response to the phase adjusted output signal. A phase adjuster, which has full phase wrap-around capability, generates the phase correction signal in response to the phase difference between the phase adjusted output signal and the ideal signal.

Phase tracking system

A receiver comprises a demodulator for providing a demodulated signal and a centroid calculator responsive to the demodulated signal for identifying a correct carrier phase for use in the centroid calculation and in removing carrier phase ambiguity in the demodulator. In addition, the centroid calculator may include a limiter.

Carrier phase ambiguity correction

A centroid calculator calculates the channel virtual center for an adaptive equalizer, based on some type of training signal (e.g., the segment sync of a ATSC-DTV signal), with internal limiting capability that improves its performance. In addition, a centroid calculator with internal limiting capability that improves performance.

Symbol timing ambiguity correction

A method and apparatus for reliably detecting MPEG-2 packet sync-byte positions received via a digital transmission system in the event of a packet stream containing a plurality of null packets of a plurality of packets containing a fixed repeating bit pattern and for reliably synchronizing and delivering the MPEG-2 stream broadcast to the receiver transport layer. A Null-Packet Detector compares the content of the current packet with a fixed (or predetermined) bit pattern to detect a null packet to reliably identify the location of the sync-byte of the null packet. a sync-byte position is identified based upon the position of the predetermined fixed bit pattern in the header portion of a plurality of null-packets in the stream.

Method and apparatus for processing null packets in a digital media receiver

A television set includes an ATSC (Advanced Television Systems Committee) receiver, which includes an NTSC (National Television Systems Committee) co-channel interference detector based on carrier tracking of the NTSC video carrier signal. The NTSC co-channel interference detector includes a carrier tracking loop and a decision device. The carrier tracking loop processes a received signal for detecting the possible presence of the NTSC video carrier signal and for providing a tracking signal representative thereof. The decision device receives the tracking signal and recovers a DC offset therefrom. The decision device then determines that NTSC co-channel interference is present if the DC offset signal is greater than a predefined threshold.

Apparatus and method for detecting NTSC co-channel interference

An apparatus for automatically selecting one of a standard decision directed mode and a soft dd mode in a decision feedback equalizer for receiving a data signal comprises an equalizer for providing a DFE output signal and having a control input responsive to a control signal exhibiting a first value for selecting the standard dd mode and a second value for selecting the soft dd mode. The equalizer includes a lock detector having an output for providing a lock signal indicative of equalizer convergence. The apparatus includes a mode selector having an input coupled to the lock detector output and having an output coupled to the control input for providing an output signal exhibiting one of the first and second values depending upon characteristics of the lock signal.

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Carmel, IN, United States of America

Ivonete Markman