Seagate Technology Incorporated

Cypress Semiconductor Corporation

Ivan Petrov Ivanov

Dimitar Velikov Dimitrov

Wei Tian

Antoine Khoueir

Ming Sun

Dexin Wang

Venugopalan Vaithyanathan

Muralikrishnan Balakrishnan

Yang Dong

Paul E Anderson

Yongchul Ahn

Insik Jin

Olle Gunnar Heinonen

Brian Lee

John D Stricklin

Chan-Lon Yang

Mira Ben-Tzur

Christina L Hutchinson

Shuiyuan Huang

Gorley L Lau

Mallika Kamarajugadda

Peter Nicholas Manos

Feng Dai

Mark Smith

Lili Jia

Shuiyan Huang

Tian Wei

Frederick Eisenmann

Shuiyuan Haung

A magnetic memory element that has a stress-induced magnetic anisotropy. The memory element has a ferromagnetic free layer having a switchable magnetization orientation switchable, a ferromagnetic reference layer having a pinned magnetization orientation, and a non-magnetic spacer layer therebetween. The free layer may be circular, essentially circular or nearly circular.

Memory cell with stress-induced anisotropy

Programmable metallization memory cells having a planarized silver electrode and methods of forming the same are disclosed. The programmable metallization memory cells include a first metal contact and a second metal contact, an ion conductor solid electrolyte material is between the first metal contact and the second metal contact, and either a silver alloy doping electrode separates the ion conductor solid electrolyte material from the first metal contact or the second metal contact, or a silver doping electrode separates the ion conductor solid electrolyte material from the first metal contact. The silver electrode includes a silver layer and a metal seed layer separating the silver layer from the first metal contact.

Programmable metallization memory cell with planarized silver electrode

Various embodiments of the present invention are generally directed to a method of forming a conductive via plug in a semiconductor device. A first and second metal layer are electrically connected by a via plug that is formed by depositing a tungsten seed layer on a plurality of metal barrier layers within a recess using atomic layer deposition. The recess is then filled with tungsten using chemical vapor deposition.

Conductive via plug formation

A method of forming a layer of alpha-tantalum on a substrate including the steps of depositing a layer of titanium nitride on a substrate; and depositing a layer of alpha-tantalum on the layer of titanium nitride, wherein the deposition of the alpha-tantalum is carried out at temperatures below about 300&#xb0; C.

Methods of forming layers of alpha-tantalum

A magnetic element and a method for making a magnetic element. The method includes patterning a first electrode material to form a first electrode on a substrate and depositing filler material on the substrate around the first electrode. The method further includes polishing to form a planar surface of filler and the first electrode. A magnetic cell is formed on the planar surface and a second electrode is formed on the magnetic cell. In some embodiments, the first electrode has an area that is at least 2:1 to the area of the magnetic cell.

Method of fabricating a magnetic stack design with decreased substrate stress

In one embodiment, a via structure includes a liner, a barrier layer over the liner, and an aluminum layer over the barrier layer. The barrier layer helps minimize reaction between the aluminum layer and the liner, thus helping minimize void formation in the via. The liner and the barrier layer may be deposited in-situ by ionized metal plasma (IMP) physical vapor deposition (PVD). In one embodiment, the liner comprises titanium, while the barrier layer comprises titanium nitride.

Aluminum-filled via structure with barrier layer

A method for depositing a metal layer on a substrate includes the steps of depositing a first metal layer at a first deposition temperature; depositing a second metal layer on the first metal layer at a second deposition temperature higher than the first deposition temperature; reducing at least one of a growth rate and a temperature of at least the second metal layer; and depositing a third metal layer on the second metal layer. Preferably, the growth rate is reduced substantially to zero and the temperature is reduced to a point below which the second metal layer ceases to flow. By interrupting the processing the metal layer prior to the third metal layer forming step by the reducing and/or cooling step, the formation of whiskers and other similar thermal stress-induced defects is suppressed or inhibited, resulting in a substantially smooth and substantially defect free metal layer.

Method of depositing metal onto a substrate

IC fabrication employs the deposition of aluminum as a metallization layer. Frequently, the aluminum is doped with copper in small amounts to improve electric properties. Low temperature deposition of these layers is preferred to ensure the proper microstructure and surface roughness. Low temperature deposition (below about 300&deg; C.) results in the formation of copper precipitates which can be difficult to remove. Annealing the layer formed, either prior to, or after formation of capping layers and additional layers thereon, drives the copper precipitate back into solution, permitting small dimension fabrication.

Aluminum metallization method and product

Growing community of inventors

Apple Valley, MN, United States of America

Ivan Petrov Ivanov