Future Wei Technologies, Inc.

Iulin Lih

Chenghong He

Naxin Zhang

Hongbo Shi

William C Lynch

An interconnection system comprising a plurality of nodes, each comprising at least two ports, and a plurality of links configured to interconnect ports among the nodes to form a hierarchical multi-level ring topology, wherein the ring topology comprises a plurality of levels of rings including a base ring and at least two hierarchical shortcut rings, and wherein each node connected to a higher-level shortcut ring is also connected to all lower-level rings including the base ring.

Network topology of hierarchical ring with recursive shortcuts

A network node comprises a receiver configured to receive a first packet, a processor coupled to the receiver and configured to process the first packet, and prioritize the first packet according to a scheme, wherein the scheme assigns priority to packets based on phase, and a transmitter coupled to the processor and configured to transmit the first packet. An apparatus comprises a processor coupled to the memory and configured to generate instructions for a packet prioritization scheme, wherein the scheme assigns priority to packet transactions based on closeness to completion, and a memory coupled to the processor and configured to store the instructions. A method comprises receiving a first packet, processing the first packet, prioritizing the first packet according to a scheme, wherein the scheme assigns priority to packets based on phase, and transmitting the first packet.

Phase-based packet prioritization

A hierarchical ring network comprising a plurality of nodes coupled in a base ring configuration such that each node is coupled to two adjacent nodes via base links, wherein the nodes are further coupled via a first level binary shortcut ring such that alternating nodes along the base ring act as first level nodes, and wherein each first level node is coupled to two nearest adjacent first level nodes via the first level binary shortcut ring.

Network topology of hierarchical ring with gray code and binary code

An interconnection network comprising a plurality of nodes arranged in a ring topology, wherein the nodes comprise a first node and a second node, and wherein the first node is not adjacent to the second node, a plurality of base links coupled to the nodes and configured to interconnect adjacent nodes to provide point-to-point communications between the adjacent nodes, and a first shortcut coupled to the first node and the second node, wherein the first shortcut is configured to provide a point-to-point communication between the first node and the second node, wherein the first node and the second node comprise gray code encoded addresses that are differed by 1-bit at a particular bit position, and wherein the gray code encoded addresses are node addresses of the first node and the second node encoded by a gray code algorithm that provides a 1-bit difference between successive integer values in a binary format.

Network topology of hierarchical ring with gray coding shortcuts

A computing system for handling barrier commands includes a memory, an interface, and a processor. The memory is configured to store a pre-barrier spreading range that identifies a target computing system associated with a barrier command. The interface is coupled to the memory and is configured to send a pre-barrier computing probe to the target computing system identified in the pre-barrier spreading range and receive a barrier completion notification messages from the target computing system. The pre-barrier computing probe is configured to instruct the target computing system to monitor a status of a transaction that needs to be executed for the barrier command to be completed. The processor is coupled to the interface and is configured to determine a status of the barrier command based on the received barrier completion notification messages.

System and method for barrier command monitoring in computing systems

Disclosed herein is a processing network element (NE) comprising at least one receiver configured to receive a plurality of memory request messages from a plurality of memory nodes, wherein each memory request designates a source node, a destination node, and a memory location, and a plurality of response messages to the memory requests from the plurality of memory nodes, wherein each memory request designates a source node, a destination node, and a memory location, at least one transmitter configured to transmit the memory requests and memory responses to the plurality of memory nodes, and a controller coupled to the receiver and the transmitter and configured to enforce ordering such that memory requests and memory responses designating the same memory location and the same source node/destination node pair are transmitted by the transmitter in the same order received by the receiver.

Cache coherent handshake protocol for in-order and out-of-order networks

A processing network comprising a cache configured to store copies of memory data as a plurality of cache lines, a cache controller configured to receive data requests from a plurality of cache agents, and designate at least one of the cache agents as an owner of a first of the cache lines, and a directory configured to store cache ownership designations of the first cache line, and wherein the directory is encoded to support substantially simultaneous ownership of the first cache line by a plurality but less than all of the cache agents. Also disclosed is a method comprising receiving coherent transactions from a plurality of cache agents, and storing ownership designations of a plurality of cache lines by the cache agents in a directory, wherein the directory is configured to support storage of substantially simultaneous ownership designations for a plurality but less than all of the cache agents.

Reduced scalable cache directory

A method comprising detecting at least one Quality of Service (QoS) requirement is met that indicates a very important packet (VIP) is outstanding from a source node in a multi-hop network comprising multiple nodes, sending an initiation message to an adjacent node in response to the detection that may activate a protocol in which a reserved channel is activated, and receiving the VIP via the reserved channel. Also, a method comprising receiving an initiation message from an adjacent node in a multi-hop network that comprises information identifying the VIP comprising a source node, a destination node, a packet type, wherein the initiation message activates a protocol in which a reserved channel is activated, searching for the VIP identified by the initiation message, and forwarding the VIP promptly if present via the reserved channel or forwarding an initiation message to adjacent nodes closer to the source node.

Forward progress assurance and quality of service enhancement in a packet transferring system

A home node for selecting a source node using a cache coherency protocol, comprising a logic unit cluster coupled to a directory, wherein the logic unit cluster is configured to receive a request for data from a requesting cache node, determine a plurality of nodes that hold a copy of the requested data using the directory, select one of the nodes using one or more selection parameters as the source node, and transmit a message to the source node to determine whether the source node stores a copy of the requested data, wherein the source node forwards the requested data to the requesting cache node when the requested data is found within the source node, and wherein some of the nodes are marked as a Shared state corresponding to the cache coherency protocol.

Method for peer to peer cache forwarding

A method comprising advertising to a second node a total allocation of storage space of a buffer, wherein the total allocation is less than the capacity of the buffer, wherein the total allocation is partitioned into a plurality of allocations, wherein each of the plurality of allocations is advertised as being dedicated to a different packet type, and wherein a credit status for each packet type is used to manage the plurality of allocations, receiving a packet of a first packet type from the second node, and storing the packet to the buffer, wherein the space in the buffer occupied by the first packet type exceeds the advertised space for the first packet type due to the packet.

Priority driven channel allocation for packet transferring

A network unit, comprising a processor and a random access memory (RAM) component coupled to the processor, wherein the RAM component comprises a memory management unit (MMU) and a data RAM, wherein the MMU comprises a complete page address table for translating a virtual memory address received from the processor into a physical memory address, and wherein the complete page address table is substantially static.

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San Jose, CA, United States of America

Iulin Lih