Kabushiki Kaisha Toshiba

Itaru Kawabata

Takeshi Kamigaichi

Takeshi Murata

Hirofumi Inoue

Takuya Futatsuyama

Shinichi Watanabe

Masato Endo

Hiroyuki Nitta

A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.

Nonvolatile semiconductor memory having a word line bent towards a select gate line side

A semiconductor device includes a first MOS transistor, second MOS transistors, first contact plugs, and a second contact plug. The first MOS transistor with a first conductivity is formed on a semiconductor substrate. The second MOS transistors with a second conductivity are formed on the semiconductor substrate. The first contact plugs has a circular planar shape. The second contact plug has an elliptical planar shape and is formed on a source or a drain in one of the second MOS transistors. The first contact plugs are formed on sources or drains in the remaining second MOS transistors and the first MOS transistor.

Semiconductor device including contact plug having an elliptical sectional shape

A semiconductor device includes a first trench capacitor formed in a first trench, a second trench capacitor formed in a second trench, a first gate electrode disposed above a first active area, a second gate electrode disposed above a second active area, a first impurity doped region formed in an outer periphery of the second trench including a boundary adjacent to the second trench and doped with an impurity of a first conduction type, and a second impurity doped region formed in the first impurity doped region so as to include the first active area located below the first gate electrode, the second impurity doped region being doped with an impurity of a second conduction type opposite to the first conduction type impurity.

Semiconductor device

A method of fabricating a semiconductor device includes forming trenches in active areas respectively, the trenches having sidewalls and upper openings respectively, forming first conductive regions in the trenches so that the first conductive regions serve as electrodes of the trench capacitors, respectively, each first conductive region including first impurity of a predetermined conductive type, forming sidewall insulating films on the sidewalls located over the first conductive regions respectively, forming second conductive regions inside the sidewall insulating films respectively, removing the sidewall insulating film located above the second conductive regions respectively, doping regions of the substrate located under the gate electrodes with second impurity of a reverse conduction type relative to the first impurity in the second direction from the upper openings through portions of the trenches from which the sidewall insulating films have been removed respectively, and forming third conductive regions in the portions of the trenches.

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Yokohama, Japan

Itaru Kawabata