Sumco Corporation

Sumitomo Mitsubishi Silicon Corporation

Isoroku Ono

Etsurou Morita

Toru Taniguchi

Seiji Harada

Shinji Okawa

Etsuro Morita

Satoshi Matagawa

Fumihiko Yoshida

Kazuo Hujie

Mitsuhiro Endo

Akihiko Endo

Hideki Nishihata

A method of manufacturing a semiconductor wafer, including a step of differentiating the glossiness of a front surface from that of a rear surface of the wafer by holding the semiconductor wafer in a wafer holding hole formed in a carrier plate, and simultaneously polishing a front and back surface of said semiconductor wafer by driving said carrier plate to make a circular motion associated with no rotation on its own axis within a plane parallel with a surface of said carrier plate between a pair of polishing members disposed to face to each other, by using an abrasive body with a semiconductor wafer sink rate different in polishing from that of an abrasive body for one of a polishing member on an upper surface plate and a polishing member on a lower surface plate so as to simultaneously polish both the front and rear surfaces of the semiconductor wafer, or differentiating by differentiating the rotating speed of the upper surface plate from that of the lower surface plate.

Method of manufacturing semiconductor wafer

A wafer is produced at a step of polishing a predetermined face of a wafer to flatten the predetermined face while supplying a polishing liquid onto a bonded abrasive cloth, wherein the bonded abrasive cloth comprises a urethane bonding material consisting of a soft segment having a polyfunctional isocyanate and a hard segment having a polyfunctional polyol and having an expansion ratio of 1.1-4 times and silica having an average particle size of 0.2-10 &#x3bc;m and a hydroxy group, and has a given ratio of the hard segment occupied in the urethane bonding material, a given volume ratio of silica and a given Shore D hardness.

Wafer and method of producing the same

A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.

Method for manufacturing direct bonded SOI wafer and direct bonded SOI wafer manufactured by the method

A processing time required for regeneration of a layer transferred wafer is reduced and the regeneration cost is lowered, while a removal amount at the regeneration is decreased the number of regeneration times is increased. A main surface of a semiconductor wafer () has a main flat portion () and a chamfered portion () formed in the periphery of the main flat portion (), an ion implanted area () is formed by implanting ions only into the main flat portion (), a laminated body () is formed by laminating the main flat portion () on a main surface of a support wafer (), and moreover, the semiconductor wafer () is separated from a thin layer () in the ion implanted area () by heat treatment at a predetermined temperature so as to obtain a thick layer transferred wafer (), which is to be regenerated. The main flat portion () of the semiconductor wafer () is formed to have a ring-shape step () protruding from the chamfered portion (), and the semiconductor wafer () is separated from the thin layer () on the whole surface of the ion implanted area () so that no step is generated in the periphery thereby to obtain the layer transferred wafer ().

Process for regeneration of a layer transferred wafer and regenerated layer transferred wafer

A bonded wafer is produced by bonding an ion-implanted wafer for an active layer onto a wafer for a supporting substrate, and thereafter exfoliating the wafer for the active layer at the ion-implanted position through a heat treatment and then polishing a terrace portion of the resulting active layer with a predetermined fixed grain abrasive cloth to remove island-shaped projections on the terrace portion while controlling a scattering of terrace width and smoothness of an outer peripheral face of the active layer.

Bonded wafer and method of producing the same

In a method for producing a bonded wafer by bonding a wafer for active layer to wafer for support layer and then thinning the wafer for active layer, a terrace grinding for forming a terrace portion is carried out prior to a step of exposing the oxygen ion implanted layer to thereby leave an oxide film on a terrace portion of the wafer for support layer.

Method for producing bonded wafer

A method of manufacturing a semiconductor wafer, comprising the step of differentiating the glossiness of a front surface from that of a rear surface of the wafer by using an abrasive cloth with a semiconductor wafer sink rate different in polishing from that of the other abrasive cloth for one of a polishing cloth () on an upper surface plate () and a polishing cloth () on a lower surface plate () so as to simultaneously polish both the front and rear surfaces of the semiconductor wafer (W), or differentiating by differentiating the rotating speed of the upper surface plate from that of the lower surface plate.

During polishing of the semiconductor wafer by using a double-sided polisher, a larger difference as compared to the prior art is created between a frictional resistance acting on a front surface of a silicon wafer from an upper surface plate side and a frictional resistance acting on a back surface of the silicon wafer from a lower surface plate side. Thereby, respective wafers can be rotated at as 0.1 - 1.0 rpm within corresponding wafer holding holes. Accordingly, the rotation of the wafer would not be suspended even if there were any defective condition induced during polishing. Further, partial variation or deviation in polishing volume particular in the outer periphery of the wafer would be hard to occur. Therefore, the polish-sagging is suppressed and thus the improved degree of flatness of the wafer could be obtained.

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Tokyo, Japan

Isoroku Ono