Mitsumi Electric Company Ltd.

Isao Okada

Tsuyoshi Hirabuki

Yoshiyuki Kato

Akio Tanaka

Mikito Baba

Toshihiko Yasuma

Ryuichi Sada

Koji Ide

Richard G Geiger

An optical disc apparatus has a demodulation circuit performing an FSK demodulation by being provided with a binary signal which is obtained by binarizing a signal reproduced from an optical disc on which an FSK modulation signal is previously recorded. An edge interval of the binary signal is measured. An FSK modulation component is obtained from a difference between a measured edge interval value and a previously determined edge interval reference value. A demodulation value is obtained based on a moving average of the FSK modulation component. A moving average of the demodulation value is compared with a reference value so as to obtain a binary FSK demodulation signal. Additionally, the optical disc apparatus includes a decode circuit for decoding binary data from a biphase code signal which is reproduced from an optical disc and to be inverted at an end of each bit. When an inversion of the biphase code signal is not performed at an end of a bit, the decode circuit corrects the binary data immediately before or after the end of the bit. Further, the optical disc apparatus includes a digital PLL circuit which divides a frequency of a demodulated signal reproduced from the optical disc by a predetermined dividing ratio. A clock signal is obtained based on an edge interval value of the divided modulated signal.

Demodulation circuit, a decode circuit and a digital PLL circuit for an optical disc apparatus

A speed error detecting portion detects a speed error which is a frequency difference between a reproduced clock signal which is reproduced from a recording medium and a reference clock signal. A first phase error detecting portion detects a phase error which is a phase difference between the reproduced clock signal and the reference clock signal. A servo signal generating portion generates a servo signal which is used for eliminating the speed error and phase error. A second phase error detecting portion detects a phase error which is a phase difference between a reproduced synchronization signal reproduced from the recording medium separately from the reproduced clock signal and a reference synchronization signal. A reference phase changing portion changes the phase of the reference clock signal based on the phase error detected by the second phase error detecting portion. A reference frequency changing portion changes the frequency of the reference clock signal based on the phase error detected by the second phase error detecting portion.

Servo circuit, digital PLL circuit and optical disk device

A circuit module includes one or a plurality of semiconductor parts, a substrate having the semiconductor parts mounted thereon, and terminals arranged on an outer periphery of the substrate along a plurality of sides of said substrate. The circuit module is connected to a board of a computer by plugging the terminals into corresponding terminal holes, so that the terminals are used in common for providing electrical connection and mechanical connection with the board of the computer.

Shielded circuit module with terminal pins arrayed on four sides for

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Chofu, Japan

Isao Okada