Mitsubishi Electric Corporation

Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Trivale Technologies

Isao Nojiri

Hiroyuki Murai

Atsushi Ohba

Takashi Miyayama

Ryu Makabe

Yoshihide Kai

Youichi Tobita

Takeshi Ono

Naoki Nakagawa

Seiichiro Mori

Masafumi Agari

Takahiro Nishioka

Masami Hayashi

Kenichi Miyamoto

Takeshi Shimamura

Tatsuya Baba

Masahide Kaneko

Yasuo Fujita

Hiromasa Morita

Toshiro Taniguchi

A display includes an antistatic circuit between a common wire and at least one of a signal wire and a scanning wire. The common wire is disposed in a non-display region, and receives a common potential. The signal and scanning wires are disposed in a display region. The antistatic circuit at least includes a first transistor having a floating control electrode, a first main electrode connected to the signal wire or the scanning wire, and a second main electrode connected to the common wire. The first transistor is provided in such a manner that a first capacitance between the control electrode and the signal wire or the scanning wire is larger than a second capacitance between the control electrode and the common wire.

Display

A display device includes drivers. The drivers apply a voltage having a polarity opposite to a polarity of a voltage applied to red, green, blue, and white picture elements in one first picture element columns to red, green, blue, and white picture elements in another first picture element columns adjacent to the one first picture element columns, and apply a voltage having a polarity opposite to a polarity of a voltage applied to red, green, blue, and white picture elements in one second picture element columns to red, green, blue, and white picture elements in another second picture element columns adjacent to the one second picture element columns.

Display device and method for driving same

A lateral electric field type liquid crystal display includes: an array substrate that includes: a plurality of signal lines and a plurality of scan lines arranged in a matrix to form pixel areas; and a common electrode formed to face pixel electrodes with interposing an insulating film; a counter substrate that faces the array substrate; and a liquid crystal material that is interposed between the array substrate and the counter substrate, wherein the liquid crystal material responds to an electric field parallel to a surface of the array substrate, and wherein in a vertical blanking period, which is a blanking period of a vertical period for sequentially applying scan signals to all of the scan lines, a common electrode potential is changed so that a potential difference between the common electrode potential and the pixel electrode potential becomes smaller than that before the vertical blanking period.

Liquid crystal display and driving method of the same

An edge portion of first ground wiring and an edge portion of second ground wiring are in contact with a space containing air having a relative dielectric constant smaller than a liquid crystal relative dielectric constant through an insulating film. An edge portion of common wiring and another edge portion of the first ground wiring are in contact with a sealing material having a relative dielectric constant smaller than the liquid crystal relative dielectric constant through the insulating film.

Liquid crystal panel and liquid crystal display

The present invention includes liquid crystal held between an array substrate including a display area and a color filter substrate, a seal material pasting the both substrates together outside in plan view of the display area, and column spacers between the both substrates. The seal material includes a seal periphery surrounding the display area, and seal extending portions forming an injection port of the liquid crystal by extending the seal periphery outside in plan view of the display area from both end of a partial opening. The seal periphery includes no spacer therein, and the seal extending portions include spacers therein.

Liquid crystal display device and method of manufacturing the same

A shift register circuit comprises a first transistor connected between a clock terminal and an output terminal, a second transistor for charging a control electrode of the first transistor in response to activation of an output signal of the preceding stage, a third transistor for discharging the control electrode of the first transistor, an inverter using a control electrode of the third transistor as an output end, and a fourth transistor which discharges an input end of the inverter at power-off and is turned off after power-on. A fifth transistor which is a load element of the inverter charges the control electrode of the third transistor at power-on. It is thereby possible to initialize the respective levels of the nodes without any external initialization signal and prevent a decrease in the level change rate of the output signal in the shift register circuit.

Shift register circuit

An image detector comprises: an active matrix-type TFT array substrate having a pixel area, in which photoelectric conversion elements and thin film transistors are arranged in a matrix shape, a data line, and a bias line; a conversion layer, which is arranged on the TFT array substrate and converts radiation into light; and a conductive cover, which covers the conversion layer, wherein the conductive cover is adhered in an adhesion area in an upper layer than an area, in which at least one of the data line and the bias line extend from the pixel area to each of terminals, and wherein inorganic insulation films configured by at least two layers are formed between the at least one of the data line and the bias line and the adhesion area.

Image detector

A first contact hole formed in a gate driving circuit is covered with an electrically conductive oxide film formed to be connected to the first contact hole and having a first pattern. The periphery of the electrically conductive oxide film is surrounded by an electrically conductive oxide film (a sacrifice electrode) formed simultaneously with the electrically conductive oxide film and having a second pattern form.

Scanning line driving circuit for active matrix and image display device

A detection column wiring includes a set of a first metal wiring having a zigzag pattern and a second metal wiring having a structure axisymmetric with the first metal wiring about a column direction. The first metal wiring includes first sloped portions obliquely sloped by an inclination angle of 45&#xb0; with respect to the column direction, and first parallel portions parallel with the column direction and continuous with the first sloped portions; the first sloped portions and the first parallel portions being repeatedly placed in a zigzag shape along the column direction. Each detection row wiring has the same structure. A sloped portion of the first sloped portions of the first metal wiring is always orthogonally and spatially intersected, at its middle point, with a sloped portion of the second sloped portions of the third metal wiring at its middle point. Other portions have the same orthogonal relationship.

Touch screen, touch panel and display device

Provided is a liquid crystal display device including contact hole parts in a gate line driving circuit, and light shielding layers formed of a metal material on a color filter substrate, where an insulating film is formed so as to cover the light shielding layer of the color filter substrate in a region on the array substrate, the area being opposed to the contact hole parts.

Liquid crystal display device

Each detection column wiring is constituted by a set of a first metal wiring having a zigzag pattern and a second metal wiring having a structure axisymmetric with the first metal wiring about a column direction as an axis, wherein the first metal wiring is constituted by first sloped portions which are obliquely sloped by an inclination angle of 45 degrees with respect to the column direction, and first parallel portions which are parallel with the column direction and are continuous with the first sloped portions, such that the first sloped portions and the first parallel portions are repeatedly placed in a zigzag shape along the column direction. Each detection row wiring also has the same structure. A sloped portion out of the first sloped portions of the first metal wiring is always orthogonally and spatially intersected, at its middle point, with a sloped portion out of the second sloped portions of the third metal wiring at its middle point. There is also the same orthogonal relationship among the other portions.

A semiconductor device mounted on a mother board has a circuit board to be positioned on the mother board and a semiconductor chip positioned on the circuit board. The circuit board has a connection pad, a relay pad spaced away from the connection pad, and a wire connecting between the connection pad and the relay pad on a surface of the circuit board supporting the semiconductor chip. Also, the semiconductor chip has a connection pad corresponding to the connection pad formed on the circuit board. Further, the connection pad on the circuit board and the connection pad on the semiconductor chip are electrically connected to each other through a bonding wire.

Semiconductor device and its wiring method

In a partial display mode, a source IC outputs a start signal at an 'H' level designating the start of vertical scanning by a vertical scanning circuit, over a plurality of cycles from before a time Tto after a time T. A plurality of shift registers sequentially shift the start signal in synchronization with a clock signal to sequentially drive a plurality of activation enable signals, respectively, to an 'H' level. Then, after time Twhen first to fourth activation enable signals simultaneously attain an &#x201c;H&#x201d; level, the source IC outputs an enabling signal at an &#x201c;H&#x201d; level to the vertical scanning circuit. In response, the vertical scanning circuit simultaneously activates first to fourth gate lines corresponding to the first to the fourth activation enable signals, respectively.

Growing community of inventors

Tokyo, Japan

Isao Nojiri