Victor Company of Japan, Limited

Isao Masuda

Kazunori Nishikawa

Yoshiki Iwasaki

Makoto Komura

Shoji Ueno

Nobuaki Takahashi

Hiroyuki Sugiyama

Hideo Sato

Masami Yamazaki

A data producing device in a signal reproducing apparatus, comprises a shift register supplied with synchronizing signals and codes which are time-sequentially reproduced from a recording medium, synchronizing signal detectors supplied with the synchronizing signals from the shift register, data transfer circuits provided in parallel with respect to each other and in series with the synchronizing signal detectors, and a control circuit for controlling the data transfer circuits so that a data is selectively read out and produced from a desired data transfer circuit among the plurality of data transfer circuits. The reproduced synchronizing signals and codes are transferred to the shift register and are read out from the shift register in response to a clock pulse having a predetermined frequency. The number of the synchronizing signal detectors is equal to the number of kinds of the synchronizing signals, and the synchronizing signal detectors are provided in parallel with respect to each other. Each of the synchronizing signal detectors detect a specific synchronizing signal. A data in a predetermined code among the codes supplied to the data transfer circuits is transferred to the data transfer circuits, when a synchronizing signal for discriminating the predetermined code is detected in the synchronizing signal detectors and supplied to the data transfer circuits.

Data producing device in a signal reproducing apparatus

A synchronizing signal detecting circuit is used in a digital signal transmitting system which transmits a digital signal in which signals are time-sequentially multiplexed in terms of blocks, where each of the blocks are made up of digital data which are information signals subjected to a digital modulation, a synchronizing signal having a fixed pattern, and an error checking code arranged at a location separated from a location of the synchronizing signal by a predetermined number of bits. The synchronizing signal detecting circuit comprises a counter which is reset when a synchronizing signal detection output which has been discriminated as being correct by use of the error checking code is continuously obtained for N times, where N is a natural number greater than or equal to two.

Synchronizing signal detecting circuit in a digital signal transmitting

A memory circuit write-in system comprises a first circuit for supplying a digital signal including a time base fluctuation component, where one frame of the digital signal is constituted by at least a synchronizing signal and information data and the digital signal has a first repetition frequency with a period of one frame of the digital signal, a memory circuit for writing therein and reading out therefrom the digital signal supplied from the first circuit, and a second circuit for applying a write-in control signal to the memory circuit. The write-in control signal includes no time base fluctuation component and has a second repetition frequency substantially equal to the first repetition frequency, and the memory circuit is controlled by the write-in control signal so that write-in of the digital signal is carried out with a write-in period in a range of two times within the one frame period.

Memory circuit write-in system

A digital information recording system comprises a randomized digital signal forming circuit for forming a randomized digital signal by carrying out modulo-2 addition of at least digital information signals of a plurality of channels in a digital signal and a random code sequence which is generated independently, a detector for successively detecting values of each of a predetermined number of words from each of the digital information signals of a plurality of channels in the randomized digital signal, in terms of one word, and generating a detection signal only when values of bits in the one word are all '1' or all '0', a timing circuit for generating a timing signal for every period corresponding to a transmission period of a least significant bit in one word from each of the digital information signals of a plurality of channels, a polarity inverting circuit for passing the randomized digital signal unchanged during a period in which the detection signal is not generated from the detector, and inverting the polarity of the least significant bit in one word from each of the digital information signals of a plurality of channels in the randomized digital signal when simultaneously applied with the detection signal and the timing signal, and a recording circuit for recording a digital signal obtained from the polarity inverting circuit.

Digital information signal recording system

In a circuit arrangement for a disk player of the type arranged to reproduce information prerecorded in the form of pits, a variable gain circuit for changing the frequency characteristic of the reproduced signal is provided. The level of the reproduced signal is detected at high and low frequencies so as to produce a control signal the voltage of which varies in accordance with the difference between the level of the high frequency signal component and the level of the low frequency component. The control signal is then applied to the variable gain circuit receiving the reproduced signal so that the frequency characteristic of the reproduced signal will be controlled. Thus, the level of the reproduced signal is boosted at its high frequency range.

Circuit arrangement for a disk player for reproducing information

An information signal recording system comprises a circuit for generating pilot signals for tracking control, a circuit for generating a rectangular waveform signal of a specific frequency existing in an artificial synchronizing signal duration in every specific period and having almost no frequency component equal to and in the vicinity of the frequencies of the pilot signals, a circuit for pulse code modulating or difference modulating an information signal, further digital modulating the information signal, and obtaining a digital information signal existing in a time interval other than the artificial synchronizing signal duration. The digital information signal is recorded along a main track on a recording medium and the pilot signals are recorded along pilot signal tracks contiguous to the main track.

Systems for recording both information and pilot signals directly on

In a record disc reproducing apparatus, an abnormal sound eliminating system comprises a variable filter in the transmission system for a signal reproduced from a record disc. The filter does not pass the signal band, which is variable. A control signal generator produces a control signal in accordance with the frequency of a carrier wave reproduced from a multichannel record disc. The non-passed signal band of the variable filter is variably controlled by the control signal from the control signal generator, to eliminate a carrier wave reproduced with a frequency lower than a specific frequency. This low frequency wave appears when the multichannel record disc rotates at a low speed, less than a specific normal rotational speed. This limitation prevents the generation of abnormal sound due to the reproduced carrier wave of low frequency.

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Sagamihara, Japan

Isao Masuda