Clk Design Automation, Inc.

Isadore T Katz

Joao Moreno Geada

Murat R Becer

Shiva Raja

Lee La France

Ferenc Varadi

Ahran Dunsmoor

Leon LaFrance

James Kuzeja

A method for timing analysis of a circuit design includes, for each group of one or more instances of a cell of a cell library in the circuit design, determining timing related data for the group according to circuit context of the group in the design. The context includes at least one of a path depth, an output load, and an input slew rate. The determined timing related data are applied to analyze the circuit design.

Database based timing variation analysis

A method includes grouping cells with similar topological characteristics into a family of cells, the topological characteristics being defined in part by topological layouts of transistors in the respective cells in the family of cells; and computing data characterizing a relationship between a variability of delay and a magnitude of delay shared among the cells in the family of cells.

Timing variation characterization

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Harvard, MA, United States of America

Isadore T Katz