International Business Machines Corporation

Isabel Ying Yang

Michael John Hargrove

Bruce Bennett Doris

Charles W Koburger, Iii

James William Adkisson

Dominic Joseph Schepis

Omer H Dokumaci

Kenneth John Giewont

Junedong Lee

Eric Adler

Lyndon Ronald Logan

Peter I Smeys

Neena Garg

High performance asymmetric transistors including controllable diode characteristics at the source and/or drain are developed by supplying impurities with high accuracy of location by angled implants in a trench or diffusion from a solid body formed as a sidewall of doped material. High concentration gradient of impurities to support high performance is achieved by providing for reduced heat treatment after the impurity is supplied in order to limit diffusion previously necessary to achieve the desired location of impurity structures. Damascene or quasi-Damascene gate structures are also provided for high dimensional uniformity, increased manufacturing yield and structural integrity of the transistor.

Method of controlling floating body effects in an asymmetrical SOI device

A method for improving the gate activation of metal oxide semiconductor field effect transistor (MOSFET) structures are provided. The method of the present invention includes the steps of forming a plurality of patterned gate stacks atop a layer of gate dielectric material; forming a first planarizing organic film on the gate dielectric material and abutting vertical sidewalls of the patterned gate stacks, said planarizing organic film not being present on top, horizontal surfaces of each of the patterned gate stacks; blocking some of the plurality of patterned gate stacks with a first resist, while leaving other patterned gate stacks of said plurality unblocked; implanting first ions into the unblocked patterned gate stacks; removing the first resist and first planarizing organic film and forming a second planarizing organic film and blocking the previously unblocked patterned gate stacks with a second resist; implanting second ions into the patterned gate stacks that are not blocked by said second resist; and removing the second resist and the second planarizing organic film.

Anti-spacer structure for self-aligned independent gate implantation

A novel method for forming substrate contact regions on a SOI substrate without requiring additional space, and in order to provide lower diffusion capacitance. The method utilizes known semiconductor processing techniques. This method for selectively modifying the BOX region of a SOI substrate involves first providing a silicon substrate. Then, ion implanting the base using SIMOX techniques (e.g. O implant) is accomplished. Next, the substrate is photopatterned to protect the modified BOX region. Then, further ion implanting using a &ldquo;touch-up&rdquo; O implant is accomplished, thereby resulting in a good quality BOX as typically practiced. The final step is annealing the substrate. The area of the substrate, which had a mask present, would not receive the &ldquo;touch-up&rdquo; O implant (second ion implant), which in turn would result in a leaky BOX.

Method of forming a body contact using BOX modification

Growing community of inventors

Hopewell Junction, NY, United States of America

Isabel Ying Yang