International Business Machines Corporation

Irving Feinberg

Leon L Wu

James N Humenik

Herbert I Stoller

William E Dougherty, Jr

Charles J Kraus

Alan Platt

Leo Yuan

Jack L Langdon

A signal transmission line terminator for an off-chip driver circuit is disclosed in which each capacitor and resistor comprising each terminator are formed on the same chip separate from the driver circuit chip. The close proximity of the elements of the terminator reduce the path lengths therebetween to a minimum. The structure substantially eliminates the corresponding inductive reactance and concommitant .DELTA.I noise at high switching rates employed in high performance computers.

Transmission line terminator-decoupling capacitor chip for off-chip

A multiple chip module is provided with an engineering change (EC)/repair facility by means of delete lines located on both major surfaces of the module. In one embodiment, defective pin vias through the module are repaired by use of the delete lines on both major surfaces.

Engineering change facility on both major surfaces of chip module

A decoupling capacitor for mounting on an integrated circuit multi-layer ceramic. A bottom layer electrode, is evaporated or sputtered onto a carrier. A high dielectric layer is deposited followed by the upper metallurgy and a top isolating layer. Via holes are etched to respective electrode layers, BLM deposited thereon followed by solder balls. The electrode is mounted onto the substrate, solder balls face down in contact with a compatible footprint.

Thin film discrete decoupling capacitor

A decoupling capacitor for highly integrated, fast switching logic circuit modules. The capacitor comprises stacked ceramic sheets having metallized surfaces. The sheets are connected together in groups. Alternate groups are connected to a first electrode. Intervening alternate groups are connected to a second electrode. The connections are all made to the same ends of all the sheets so that the current flows in opposite directions through adjacent facing plates.

Thick film capacitor having very low internal inductance

A package for mounting, interconnecting, and cooling a large number of integrated circuit semiconductor devices having a sintered multilayer ceramic substrate provided with an internal metallurgy network made up of voltage planes, X and Y signal planes, and fan-out planes, with I/O pins on the bottom surface, and a plurality of asymmetrical solder pad clusters for flip chip bonding to a plurality of integrated circuit devices on the top surface, a plurality of integrated circuit devices bonded to the solder pad clusters, at least one row elongated engineering change pads surrounding each pad cluster, each pad provided with a severable surface link, the I/O pins connected to the internal network of the substrate and arranged in clusters with the powering voltages of each device located directly beneath the device thereby minimizing voltage drop, and signal voltages inputted through the I/O pins interspersed between the clusters of power pins, a cap for forming an enclosure over at least the top surface of the ceramic substrate, and a liquid cooling means associated with the cap for removing heat from the devices.

Growing community of inventors

Poughkeepsie, NY, United States of America

Irving Feinberg