Skyworks Solutions, Inc.

Silicon Laboratories Inc.

Cirrus Logic Inc.

Ion Constantin Tesu

James Edward Heckroth

Michael James Mills

Riad S Wahby

John Nathaniel Wilson

Marius Goldenberg

Stefan N Mastovich

Krishna Pentakota

Jeffrey Lee Sonntag

Donald E Alfano

Eric B Smith

Tufan C Karalar

Greg Ridsdale

Lyric Jackson

Michael Ireland

Russell J Apfel

Michael L Duffy

Douglas R Frey

Patrick De Bakker

David M Pietruszynski

Alan F Hendrickson

Jeffrey Allan Whaley

Siddharth Sundar

Joselyn Torres-Torres

Long Nguyen

Jiangtao Yi

Geoffrey Thompson

Long Van Nguyen

Phillip M Matthews

A method for validating operation of a driver integrated circuit includes providing a signal using an output node. The signal is provided using multiple set points in response to a change in state of an input signal. Each set point corresponds to a different phase of a multi-phase transition of the signal. The method includes providing a timer value at an end of a phase of the multi-phase transition and determining whether the signal is in a target signal range of the phase based on the timer value at the end of the phase, a predetermined value defining the target signal range of the phase, and a predetermined time limit for the phase. A current through the output node may be provided using the multiple set points, and a voltage on the output node may have the multi-phase transition.

Validation of current levels delivered by a gate driver

A gate driver includes a variable strength driver circuit that provides an output signal to drive a high power device. The gate driver receives an update request from a host controller during an operating mode in which switching operations occur and updates one or more operating parameters associated with driving the high power device. The operating parameters including turn-on parameters, turn-off parameters, and soft shutdown parameters. The variable strength driver circuit uses the turn-on parameters for turn-on phases for the output signal, uses the turn-off parameters for turn-off phases for the output signal, and uses the soft shutdown parameters for soft shutdown phases for the output signal. The update request adjusts current, voltage, and/or time for one or more phases of the turn-on, turn-off and/or soft shutdown parameters.

Updating control parameters of a gate driver during operation

A controller enumerates a plurality of devices while operating in a daisy-chain mode of operation and then causes the devices to operate in a parallel mode of operation in which the devices are individually addressed.

Enumeration of peripheral devices on a serial communication bus

A method for operating a gate driver system includes measuring a first parameter according to a first priority schedule synchronously to a first edge of a switching signal generated by a gate driver integrated circuit and having a variable duty cycle. The method includes after measuring the first parameter of the gate driver system and prior to a second edge of the switching signal, measuring at least a second parameter of the gate driver system according to a first round-robin schedule synchronously to the first edge of the switching signal.

Management of multiple switching-synchronized measurements using combined prioritized measurement and round-robin sequence measurement

A method for controlling a high-power drive device includes providing a current having a first predetermined current level to an output node during a first phase of a multi-phase turn-on process for the high-power drive device coupled to the output node. The method includes transitioning from the first phase to a second phase of the multi-phase turn-on process based on a first indication of a sensed voltage level on the output node during the first phase and a second indication of a time elapsed from a start of the first phase during the first phase. The method includes providing the current having a second predetermined current level to the output node during the second phase.

Variable current drive for isolated gate drivers

A technique for powering gate drivers in a half-bridge configuration uses a single external power supply to power each gate driver. A single on-chip regulator regulates the positive turn-on voltage for each switch. The regulator overhead, is also used as the negative voltage for turn-off, thus transferring the low-frequency variation of the external power supply to the negative turn-off voltage. Accordingly, a single on-chip regulator generates both the positive turn-on voltage and the negative turn-off voltage. In at least one embodiment, reuse of the switch turn-off current further reduces on-chip power dissipation. The on-chip regulator's output filter capacitor discharges during turn-on of the external power switching device. During turn-off, the current that discharges the switch gate capacitance recharges the regulator filter capacitor.

Generation of positive and negative switch gate control voltages

A method for driving a high-power drive device includes providing a signal having a first predetermined signal level to an output node during a first phase of a multi-phase transition process. The method includes generating a first indication of a first parameter associated with the signal provided to the output node. The method includes generating a second indication of a second parameter associated with the signal provided to the output node. The method includes providing the signal having a second predetermined signal level to the output node during a second phase of the multi-phase transition process. The method includes transitioning from the first phase to the second phase based on the first indication and the second indication. A multi-die, distributed package technique addresses power dissipation requirements for a driver product based on size and associated power dissipation needs of the high-power drive device in a target application.

Current flowing through an inductor on a primary side of a voltage converter is sensed and compared to a threshold peak current value to determine when to end an ON portion of the voltage converter. The secondary side of the voltage converter supplies an indication of output voltage for use in determining the threshold peak current value. On start-up the primary side detects when the indication of output voltage is supplied by the secondary side across on isolation channel. Prior to detecting the indicating is being supplied, the primary side uses an increasing threshold peak current as the threshold peak current value. After detection that the indication of output voltage is being provided by the secondary side, the threshold peak current value is based on the indication of the output voltage.

Soft-start for isolated power converter

An apparatus controls a high-power drive device external to a package of a gate driver circuit. A first circuit charges the control node over a first length of time in response to a first signal through the first node indicating an absence of a fault condition and a first level of a control signal. A second circuit discharges the control node over a second length of time in response to a second signal through the second node indicating the absence of the fault condition and a second level of a control signal. A third circuit includes a current amplifier and is configured as a soft shutdown path to discharge the control node over a third length of time in response to the first signal through the first node indicating a presence of the fault condition. The third length of time is different from the second length of time.

Adjustable soft shutdown and current booster for gate driver

One embodiment of a power supply apparatus includes a first switcher coupled to provide VOUT from a VSUPPLY. A cascaded second switcher is coupled to provide a subscriber line interface circuit target VBAT from VOUT, wherein the first switcher is placed in one of an active mode and an inactive mode in accordance with a function of VSUPPLY and VBAT, wherein in the active mode wherein in the inactive mode VOUT&#x2248;VSUPPLY.

Power supply with digital control loop

A current mirror apparatus includes an input stage receiving an input current, I, and no additional bias current. The apparatus includes at least one output stage coupled to mirror the input current as an output current I. The input and output stages include insulated gate transistors. A minimum required voltage drop (V) across the input stage is approximately 2V+2V, wherein Vis a threshold voltage of a selected one of the insulated gate transistors, wherein Vis a drain-to-source saturation voltage of the selected transistor. A minimum required voltage drop (V) across the output stage is approximately 2V.

Growing community of inventors

Austin, TX, United States of America

Ion Constantin Tesu