Samsung Electronics Co., Ltd.

Amotech Co., Ltd.

Inyoung Lee

Hyunsoo Chung

Chanho Lee

Hansung Ryu

Jinwoo Jung

Sungdong Cho

Jinkuk Bae

Taeyoung Kim

Youngmin Lee

Donghyeon Jang

Jae-Bong Chun

Wonkeun Kim

Wonseok Jeong

Woosuk Kang

Sewoong Kim

Kwangwuk Park

Chaeup Yoo

Yongwon Choi

Seokhwan Jeong

Jiwoo Lee

Jaebong Chun

Sumin Yun

Won Tae Kim

Jongsoo Kim

Jung-Hoon Han

Taeje Cho

Seokho Kim

Yeonjin Lee

Jimin Choi

Kyuha Lee

Suk Hyun

Kunsang Park

Sangbong Sung

Sanggon Shin

Yongjoo Shin

Hyoungyol Mun

Youngjae Ko

Joongwon Shin

Haeseok Park

Sohyeon Kim

Sanghyeok Cho

Yuri Sin

Ilgeun Jung

A semiconductor package includes a first structure having a first insulating layer and a first bonding pad penetrating the first insulating layer, and a second structure on the first structure and having a second insulating layer bonded to the first insulating layer, a bonding pad structure penetrating the second insulating layer and bonded to the first bonding pad, and a test pad structure penetrating the second insulating layer and including a test pad in an opening penetrating the second insulating layer and having a protrusion with a flat surface, and a bonding layer filling the opening and covering the test pad and the flat surface, the protrusion of the test pad extending from a surface in contact with the bonding layer, and the flat surface of the protrusion being within the opening and spaced apart from an interface between the bonding layer and the first insulating layer.

Semiconductor package

A semiconductor device includes a semiconductor substrate, a conductive pad disposed on the semiconductor substrate, and a pillar pattern disposed on the conductive pad. The semiconductor device further includes a solder seed pattern disposed on the pillar pattern, and a solder portion disposed on the pillar pattern and the solder seed pattern. A first width of the solder seed pattern is less than a second width of a top surface of the pillar pattern.

Semiconductor device and method of fabricating the same

A semiconductor chip, a semiconductor package including the same, and a method of fabricating the same, the semiconductor chip including a substrate that includes a device region and an edge region; a device layer and a wiring layer that are sequentially stacked on the substrate; a subsidiary pattern on the wiring layer on the edge region; a first capping layer that covers a sidewall of the subsidiary pattern, a top surface of the wiring layer, and a sidewall of the wiring layer, the first capping layer including an upper outer sidewall and a lower outer sidewall, the lower outer sidewall being offset from the upper outer sidewall; and a buried dielectric pattern in contact with the lower outer sidewall of the first capping layer and spaced apart from the upper outer sidewall of the first capping layer.

Semiconductor chip including buried dielectric pattern at edge region, semiconductor package including the same, and method of fabricating the same

According to an embodiment, an electronic device may include a display including a first conductive plate, a printed circuit board interposed between a rear surface of housing and the display and including a second conductive plate, a first conductive pattern and a second conductive pattern that are interposed between the display and the printed circuit board, a wireless communication circuit electrically connected to the first conductive pattern and transmitting or receiving an RF signal of a first frequency or an RF signal of a second frequency, and at least one processor electrically connected to the wireless communication circuit. Besides, various embodiments as understood from the specification are also possible.

Electronic device comprising antenna

A semiconductor device, includes: a substrate having a first surface on which a plurality of devices are disposed and a second surface, opposite to the first surface; an interlayer insulating film on the first surface of the substrate; an etching delay layer disposed in a region between the substrate and the interlayer insulating film; first and second landing pads on the interlayer insulating film; a first through electrode penetrating through the substrate and the interlayer insulating film; and a second through electrode penetrating the substrate, the etching delay layer, and the interlayer insulating film, the second through electrode having a width, greater than that of the first through electrode, wherein each of the first and second through electrodes includes first and second tapered end portions in the interlayer insulating film, each of first and second tapered end portions having a cross-sectional shape narrowing closer to the landing pads.

Semiconductor device

A semiconductor chip including a semiconductor substrate having a first surface and a second surface and having an active layer in a region adjacent to the first surface, a first through electrode penetrating at least a portion of the semiconductor substrate and connected to the active layer, a second through electrode located at a greater radial location from the center of the semiconductor substrate than the first through electrode, penetrating at least a portion of the semiconductor substrate, and connected to the active layer. The semiconductor chip also including a first chip connection pad having a first height and a first width, located on the second surface of the semiconductor substrate, and connected to the first through electrode, and a second chip connection pad having a second height greater than the first height and a second width greater than the first width, located on the second surface of the semiconductor substrate, and connected to the second through electrode.

Semiconductor chip, semiconductor device, and semiconductor package including the semiconductor chip

A semiconductor package may include a base, a first chip on the base, and first connection patterns that connect and couple the base and the first chip. The first chip may include a substrate, pad patterns on the substrate, a passivation layer on the substrate and having openings, and pillars on the substrate, the pad patterns include a first signal pad and a second signal pad, the first connection patterns are in contact with the pillars, the pillars include a first signal pillar in contact with the first signal pad and a second signal pillar in contact with the second signal pad, the openings in the passivation layer include a first opening having a sidewall facing a side surface of the first signal pillar and surrounding the side surface of the first signal pillar, and a second opening having a sidewall facing a side surface of the second signal pillar and surrounding the side surface of the second signal pillar, and a maximum width of the second opening is greater than a maximum width of the first opening.

Semiconductor packages

Disclosed is a semiconductor device comprising a semiconductor substrate, a conductive pad on a first surface of the semiconductor substrate, a passivation layer on the first surface of the semiconductor substrate, the passivation layer having a first opening that exposes the conductive pad, an organic dielectric layer on the passivation layer, the organic dielectric layer having a second opening, and a bump structure on the conductive pad and in the first and second openings. The organic dielectric layer includes a material different from a material of the passivation layer. The second opening is spatially connected to the first opening and exposes a portion of the passivation layer. The bump structure includes a pillar pattern in contact with the passivation layer and the organic dielectric layer.

A semiconductor device including a substrate, an insulating layer on the substrate and including a trench, at least one via structure penetrating the substrate and protruding above a bottom surface of the trench, and a conductive structure surrounding the at least one via structure in the trench may be provided.

Semiconductor device and method for manufacturing the same

Various embodiments relate to an electronic device that supports millimeter wave communication. The electronic device may include: a housing; an antenna structure including at least one antenna comprising a portion of the housing or positioned in the housing, and including an annular conductive structure comprising a conductive material, the annular conductive structure having a first surface facing an outside of the housing, a second surface facing a direction opposite the first surface, an internal space defined by the first surface and the second surface, and a plurality of slots having a repeating pattern and formed through the first surface to the internal space; a conductive member comprising a conductive material disposed in the internal space; a wireless communication circuit electrically connected with the conductive member and configured to form a directional beam using the antenna structure; and a ground electrically connected to the annular conductive structure.

Electronic device and antenna structure thereof

According to various embodiments, an electronic device includes a front plate, a rear plate facing away from the front plate, and a side member surrounding the space between the front plate and the rear plate. The side member comprises: a housing including a conductive annular member; at least one mounting member connected to the side member and detachably mounted to a portion of the human body such that the rear plate is configured to be oriented toward a portion of the human body; a substrate (PCB) disposed in parallel with the front plate in the space and including a ground plane; at least one wireless communication circuit disposed on the substrate; a first electrical path connected between the wireless communication circuit and a first point of the conductive annular member; and a second electrical path connected between the ground plane and a second point of the conductive annular member, wherein a first region of the conductive annular member defined between the first point and the second point has a first length, and a second region of the conductive annular member defined between the first point and the second point has a second length that is shorter than the first length, wherein the side member includes an extension part disposed in the space and extending along a first region of the annular member or a portion of the second region and may include a conductive pattern electrically connected to the wireless communication circuit. Various other embodiments may be possible. Various embodiments may be possible.

Multi feeding antenna and electronic device including same

Growing community of inventors

Yongin-si, South Korea

Inyoung Lee