Samsung Electronics Co., Ltd.

Korea Advanced Institute of Science and Technology

Sungkyunkwan University

Insu Jeon

Hyeokshin Kwon

Youngtek Oh

Hwansoo Suh

Jaehyeong Lee

Wontaek Seo

Jinwook Jung

Jaeho Shin

Taehwan Jang

Seunggeol Nam

Jhinhwan Lee

Qinke Wu

Young-jae Song

Seong-jun Jung

Sung-kyu Jang

Hyowon Kim

Sung-joo Lee

Jiyeon Ku

Wonhee Ko

Min Wang

Min-woo Kim

Jinhyoun Kang

Sungho Han

Yeongtek Oh

A qubit memory of a quantum computer is provided. The qubit memory according to an embodiment includes a first readout unit, a first transmon, and a first data storage unit storing quantum information, and the first data storage unit includes a first superconducting waveguide layer, an insulating layer, and a superconductor layer sequentially stacked on a substrate. In one example, the first superconducting waveguide layer may include a superconducting resonator.

Superconducting qubit memory of quantum computer

An active circulator includes: an active filter; and a power divider serially connected to the active filter, wherein three or more combinations of the active filter and the power divider are connected to form a loop.

Active circulator and quantum computer system with active circulator

Provided is a quantum computing device and system. The quantum computing device includes a first qubit chip, a readout cavity structure surrounding a first end part of the first qubit chip, and a storage cavity structure surrounding a second end part of the first qubit chip, wherein the first qubit chip includes a first readout antenna disposed within the readout cavity structure, a first storage antenna disposed in the storage cavity structure, and a first qubit element provided between the first readout antenna and the first storage antenna, and wherein the first qubit element is disposed between the readout cavity structure and the storage cavity structure.

Quantum computing device and system

Provided are transistors including an electride electrode. The transistor includes a substrate, a source region and a drain region doped with ions of different polarity from the substrate in a surface of the substrate, a source electrode and a drain electrode including an electride material on the source region and the drain region, a gate insulating layer surrounding the source electrode and a drain electrode on the substrate, and a gate electrode between the source electrode and the drain electrode on the substrate. The source electrode and the drain electrode have an ohmic contact with the substrate.

Transistor including electride electrode

Provided is a three-dimensional (3D) transmon qubit apparatus including a body portion, a driver, a transmon element disposed in an internal space of the body portion, a first tunable cavity module disposed in the internal space of the body, and comprising a first superconductive metal panel; and a second tunable cavity module disposed in the internal space of the body, and comprising a second superconductive metal panel, wherein the transmon element is disposed between the first superconductive metal panel and the second superconductive metal panel; wherein the first tunable cavity module and the second tunable cavity module are configured to adjust a distance between the first superconductive metal panel and the second superconductive metal panel, and wherein the driver is configured to tune a resonance frequency by adjusting a 3D cavity by adjusting the distance between the first superconductive metal panel and the second superconductive metal panel.

Three-dimensional transmon qubit apparatus

A silicene electronic device includes a silicene material layer. The silicene material layer of the silicene electronic device has a 2D honeycomb structure of silicon atoms, is doped with at least one material of Group I, Group II, Group XVI, and Group XVII, and includes at least one of a p-type dopant region doped with a p-type dopant and an n-type dopant region doped with an n-type dopant. An electrode material layer including a material having a work function lower than the electron affinity of silicene is formed on the silicene material layer.

Silicene electronic device

A transporting apparatus configured to transport an object to a storage container includes: a transporting rod having one end configured to connect to the object, the transporting rod extending in a transporting direction of the object; a transporting portion that moves the transporting rod in the transporting direction of the object; and a contact sensor portion provided on an outer wall of the transporting rod and configured to sense contact between the transporting rod and the storage container.

Transporting apparatus and method of transporting using the same

An amplifier circuit and a method of recovering an input signal in the amplifier circuit are provided. The amplifier circuit may recover an input signal by using a time constant and an output signal of a signal amplifier which is delayed by a certain period, based on characteristics of an inverse Laplace transform of a transfer function of the signal amplifier. A time required for recovering the input signal may be shorter than the time constant of the signal amplifier.

Amplifier circuit and method of recovering input signal in the amplifier circuit

A piezoelectric actuator and a method of measuring a motion by using the piezoelectric actuator are provided. The piezoelectric actuator includes: a movable member that is disposed to face the fixed member; a piezoelectric element that is disposed between the fixed member and the movable member, and configured to operate in a shear mode based on input voltages applied to the piezoelectric element and move the movable member relative to the fixed member; and a position sensor that is disposed between the piezoelectric element and the movable member, and configured to measure a motion of the movable member.

Piezoelectric actuator and method of measuring motion by using the same

Provided are methods of forming nanostructures, methods of manufacturing semiconductor devices using the same, and semiconductor devices including nanostructures. A method of forming a nanostructure may include forming an insulating layer and forming a nanostructure on the insulating layer. The insulating layer may have a crystal structure. The insulating layer may include an insulating two-dimensional (2D) material. The insulating 2D material may include a hexagonal boron nitride (h-BN). The insulating layer may be formed on a catalyst metal layer. The nanostructure may include at least one of silicon (Si), germanium (Ge), and SiGe. The nanostructure may include at least one nanowire.

Method of forming nanostructure, method of manufacturing semiconductor device using the same, and semiconductor device including nanostructure

Multi-qubit devices and quantum computers including the same are provided. The multi-qubit device may include a first layer including a plurality of qubits; a second layer that is disposed on the first layer, and comprises a plurality of flux generating elements that apply flux to the plurality of qubits, a plurality of wire patterns that provide current to the plurality of flux generating elements, and a plurality of plugs that are disposed perpendicular to the plurality of flux generating elements and the plurality of wire patterns and interconnect the plurality of flux generating elements and the plurality of wire patterns. Each of the plurality of flux generating elements may be integrated with a corresponding one of the plurality of wire patterns and a corresponding one of the plurality of plugs.

Multi-qubit device and quantum computer including the same

A method includes growing a graphene layer on a metal layer, intercalating a first material between the metal layer and the graphene layer by heating the first material at a first pressure and a first temperature, and intercalating a second material between the metal layer and the graphene layer by heating the second material at a second pressure different from the first pressure and a second temperature different from the first temperature. Accordingly, the first material and the second material are chemically bonded to each other to form an insulating layer, and the insulating layer may be between the metal layer and the graphene layer.

Method of intercalating insulating layer between metal and graphene layer and method of fabricating semiconductor device using the intercalation method

Growing community of inventors

Seoul, South Korea

Insu Jeon