Samsung Electronics Co., Ltd.

Inkyoung Heo

Sunghee Han

Yoosang Hwang

Taejin Park

Sohyun Park

Keunnam Kim

Wooyoung Choi

Jin-Hwan Chun

Hui-Jung Kim

Seung-Heon Lee

Seok H Lee

Myeong-Dong Lee

Junhyeok Ahn

Hyo-Sub Kim

Youn-seok Choi

Jae Hyun Yoon

The semiconductor device provided comprises a substrate that includes active regions that extends in a first direction and a device isolation layer that defines the active regions, word lines that run across the active regions in a second direction that intersects the first direction, bit-line structures that intersect the active regions and the word lines and that extend in a third direction that is perpendicular to the second direction, first contacts between the bit-line structures and the active regions, spacer structures on sidewalls of the bit-line structures, and second contacts that are between adjacent bit-line structures and are connected to the active regions. Each of the spacer structures extends from the sidewalls of the bit-line structures onto a sidewall of the device isolation layer.

Semiconductor devices having improved electrical characteristics and methods of fabricating the same

A semiconductor memory device includes a substrate having a first active pattern including first and second source/drain regions, a gate electrode intersecting the first active pattern and disposed between the first and second source/drain regions, a bit line intersecting the first active pattern and electrically connected to the first source/drain region, a spacer disposed on a sidewall of the bit line, a contact electrically connected to the second source/drain region and spaced apart from the bit line with the spacer interposed therebetween, an interface layer disposed between the second source/drain region and the contact, and forming an ohmic contact between the second source/drain region and the contact, and a data storage element disposed on the contact. A bottom of the contact is lower than a top surface of the substrate. The contact is formed of a metal, a conductive metal nitride, and/or a combination thereof.

Semiconductor memory device and method for manufacturing the same

A semiconductor memory device includes; a first impurity region and a second impurity region spaced apart in a semiconductor substrate, a bit line electrically connected to the first impurity region, a storage node contact electrically connected to the second impurity region, an air gap between the bit line and the storage node contact, a landing pad electrically connected to the storage node contact, a buried dielectric pattern on a sidewall of the landing pad and on the air gap, and a spacer capping pattern between the buried dielectric pattern and the air gap.

Semiconductor memory device having spacer capping pattern disposed between burried dielectic pattern and an air gap and method of fabricating same

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Hwaseong-si, South Korea

Inkyoung Heo