Samsung Electronics Co., Ltd.

Inkyeong Yoo

Hojung Kim

Seongho Cho

Jungwoo Kim

Jung Woo Kim

Moon Gyu Han

Seong Ho Cho

Youngsoo Park

Xianyu Wenxu

Jongwan Kim

Myoungjae Lee

Kwonyoung Kim

Byeonghak Kang

A film for writing may include: a rough layer, including a non-flat surface, configured to transmit a first light beam and a second light beam of different wavelength bands; and/or a photonic crystal layer, arranged on the rough layer, configured to transmit the first light beam and configured to reflect the second light beam. A film for writing, which transmits visible rays, may include: a non-flat layer. A difference between a maximum thickness and a minimum thickness of the non-flat layer may be from about 220 nanometers (nm) to about 2 microns (&#x3bc;m). A film for writing may include: a first layer; and/or a second layer on the first layer. The first layer may be configured to transmit first and second light beams of different frequency bands. The second layer may be configured to transmit the first light beam, but to reflect the second light beam.

Films for writing and display apparatuses including the same

Example embodiments relate to a method of fabricating a synapse memory device capable of being driven at a low voltage and realizing a multi-level memory. The synapse memory device includes a two-transistor structure in which a drain region of a first transistor including a memory layer and a first source region of a second transistor share a source-drain shared area. The synapse memory device is controlled by applying a voltage through the source-drain shared area. The memory layer includes a charge trap layer and a threshold switching layer, and may realize a non-volatile multi-level memory function.

Method of fabricating synapse memory device

Provided are a weighting device that may be driven at a low voltage and is capable of embodying multi-level weights, a neural network, and a method of operating the weighting device. The weighting device includes a switching layer that may switch between a high resistance state and a low resistance state based on a voltage applied thereto and a charge trap material layer that traps or discharges charges according to a resistance state of the switching layer. The weighting device may be used for controlling a weight in a neural network.

Weighting device, neural network, and operating method of the weighting device

A non-volatile inverter may be configured to perform a memory function. The non-volatile inverter may include first and second transistors. The first transistor may include a first gate electrode, a first electrode, and a second electrode. The second transistor may include a second gate electrode and a third electrode and may share the second electrode with the first transistor. The first transistor may include a first switching layer and a charge trap layer. The first switching layer may be configured to switch between a high resistance state and a low resistance state. The charge trap layer may be configured to trap or de-trap charges according to the resistance state of the first switching layer. The first switching layer may include a P-N diode. The second transistor may include a second gate switching layer and a charge trap layer.

Non-volatile inverter

A light-emitting apparatus includes a light source to emit light, a photonic crystal to pass light of different wavelengths based on the light from the light source, and a projector to project the light passing through the photonic crystal. The photonic crystal may be electrically or mechanically controlled to pass the different wavelengths of light.

Light-emitting apparatus capable of adjusting a color of a projected light thereof

Provided is a non-volatile memory device that may include a plurality of variable resistors, each of the variable resistors having first and second terminals, the plurality of variable resistors arranged as a first layer of a plurality of layers and having data storage capability, at least one common bit plane arranged as a second layer of the plurality of layers and coupled to the first terminal of each of the variable resistors of the first layer, and a plurality of bit lines coupled to the second terminal of each of the variable resistors of the first layer.

Growing community of inventors

Yongin-si, South Korea

Inkyeong Yoo