Samsung Electronics Co., Ltd.

Hanyang Hak Won Co., Ltd.

In-Young Kim

Jong-Hwa Kim

Young-Joon Choi

June Hyung Lee

Sang-min Lee

Seok-Cheon Kwon

Kyeong-Han Lee

HyoJoong Kim

Songha Oh

Yeon-Ho Kim

ByeongHoon Kim

Sang Bong Shin

Oh-Suk Kwon

Jong-youn Lee

Joo-Ah Kang

Soon-Young Kim

See-Youn Kwon

Sung-Hwa Hong

Sun-I Kim

A semiconductor device includes a substrate including an active region defined by a device isolation pattern and a floating gate on the active region. The floating gate includes an upper portion, a lower portion having a width greater than a width of the upper portion, and a step-difference portion between the upper portion and the lower portion. A dielectric pattern is on the floating gate, and a control gate is on the dielectric pattern. The lower portion of the floating gate has a height of about 4 nm or more.

Methods of manufacturing semiconductor devices including variable width floating gates

Semiconductor devices including variable width floating gates

A flash memory device includes a memory cell array, a clock signal input, an input for receiving a signal designating a writing operating mode, a plurality of data input/output pads, and a data input/output buffer circuit that is electrically connected to the clock signal input and to the plurality of data input/output pads. The data input/output buffer circuit is configured to receive data that is to be written to the memory cell array through the data input/output pads in synchronization with a clock signal that is applied to the clock signal input in response to activation of the signal designating the writing operating mode.

Flash memory devices with high data transmission rates and memory systems including such flash memory devices

A guiding apparatus and a method for cochlear implant are disclosed. In one embodiment, the guiding apparatus for cochlear implant comprises i) an optical tube for transmitting an optical signal, ii) an optical signal emitting module for converting an electrical signal into the optical signal and emitting the optical signal through another end of the optical tube, iii) an optical signal detecting module for receiving the optical signal that is reflected by an obstacle or an inner wall of cochlear through another end of the optical tube and converting the received optical signal into an electrical signal and iv) a central processor for analyzing optical emission energy information and optical detection energy information to generate inserting route information. According to one embodiment, it is possible to decrease injuries to the inner wall of a cochlear canal and optimize the position of an electrode to be inserted into the cochlear canal.

Guiding apparatus and method for cochlear implant

A method and device for copying-back data in a multi-chip flash memory device having first and second memory chips. The method may include reading first source data from a first source region of one of the memory chips; programming the first source data into a target region included in one of the memory chips and reading second source data from second source region of the other memory chip different from the memory chip including the target region. Reading the second source data may be carried out while programming the first source data.

Multi-chip flash memory device and copy-back method thereof

A non-volatile semiconductor memory device includes a cell array including a plurality of memory cells arranged in a plurality of rows and columns. A page buffer circuit includes a plurality of page buffers corresponding to the plurality of columns, respectively, each page buffer including a first register that is configured to store programming data for a page memory cells and a second register that is configured to store contents of the first register and outside input data. A pass/fail check circuit is configured to generate a programming verification result for the pages of memory cells responsive to the contents of the first registers. A pass/fail check latch circuit is configured to store the programming verification result.

Non-volatile memory devices that include a programming verification function

An integrated circuit device includes a semiconductor substrate having an interlayer insulating layer thereon and a first junction block embedded in the interlayer insulating layer. The first junction block includes a first plurality of conductive junction traces located side-by-side within the interlayer insulating layer and a corresponding first plurality of pairs of conductive vias connected to opposite ends of respective ones of the first plurality of conductive junction traces. The first junction block also includes a dummy conductive trace located adjacent the first plurality of conductive junction traces and a pair of dummy conductive vias connected to opposite ends of the dummy junction trace. The integrated circuit device further includes a plurality of upper metallization traces routed on the interlayer insulating layer. The upper metallization traces are configured to electrically connect with the first plurality of pairs of conductive vias and maintain the dummy conductive trace and the pair of dummy conductive vias in an unused and electrically floating condition.

Junction interconnection structures

A flash memory device may include: a plurality of main bit lines; a plurality of redundant bit lines; a plurality of first page buffers respectively organized as a plurality of first page buffer groups which are connected to main bit lines; a plurality of second page buffers respectively organized as a plurality of second page buffer groups which are connected to the redundant bit lines; each of the first and second page buffers including an output P/F terminal to provide pass/fail data; a plurality of fuses corresponding to the pluralities of the first and second page buffer groups, respectively, each of the fuses having one end commonly connected to the P/F terminals in a corresponding page buffer group and the other end connected to a signal line; and a pass/fail check circuit to determine an overall pass/fail signal based upon a signal on the signal line.

Semiconductor memory device having flexible column redundancy scheme

A method and device for detecting a lead fault by analyzing a electrocardiogram signal from a telemetric or portable electrocardiogram system using software. In the device for detecting a lead fault, the electrocardiogram signal can be analyzed using software by a microcontroller without an extra microcontroller, so that the size of a telemetric or portable electrocardiogram system can be reduced while also reducing power consumption.

Growing community of inventors

Seoul, South Korea

In-Young Kim