Advanced Semiconductor Engineering, Inc.

In-De Ou

Chih-Pin Hung

Yi-Chuan Ding

Kun-Ching Chen

Shin-Hua Chao

Yung-Hui Wang

Chia-Shang Chen

Kuang-Hua Lin

A carrier with embedded components comprises a substrate and at least one embedded component. The substrate has at least one slot and a first composite layer. The embedded component is disposed at the slot of the substrate. The first composite layer has a degassing structure, at least one first through hole and at least one first fastener, wherein the degassing structure corresponds to the slot, the first through hole exposes the embedded component, and the first fastener is formed at the first through hole and contacts the embedded component. According to the present invention, the degassing structure can smoothly discharge the hydrosphere existing within the carrier under high temperature circumstances and the first fastener is in contact with the embedded component, which increases the joint strength between the embedded component and the substrate.

Carrier with embedded component and method for fabricating the same

A lead frame package structure with high density of lead pins arrangement is formed. The lead frame structure includes a die, a plurality of first lead pins and a plurality of second lead pins, wherein the first lead pins and the second lead pins are positioned on at least one side of the die, and are electrically connected to the die. The first lead pins and the second lead pins are selected from a group consisting of J-leads, L-leads and I-leads, and terminals of the first lead pins and terminals of the second lead pins are staggered so that the high density of lead pins arrangement is formed without risking a short circuit.

Lead frame package structure with high density of lead pins arrangement

A circuit substrate includes a board, a plurality of metal layers and an insulator. The board has a plurality of conductive traces layers and a via formed therein. The metal layers are formed on the inner wall of the via and each of the metal layers is electrically connected to its corresponding conductive traces layer. The via is filled with the insulator so that each of the metal layers is electrically isolated from each other. In addition, this invention also provides a fabrication method of the circuit substrate.

Circuit substrate and fabrication method thereof

A semiconductor build-up package includes a die, a metal carrier, and a plurality of dielectric layers. The metal carrier has a surface with a cavity for supporting the die. The surface of metal carrier is coplanar to the active surface of die for building up a plurality of dielectric layers. Each dielectric layer has metal columns for inner electrical connection. The metal carrier covers passive surface and sides of the die with a larger area for heat dissipating, so the heat generated from the die is dissipated fast through the metal carrier.

Thermally enhanced semiconductor build-up package

A method for making a build-up package of a semiconductor die and a structure formed from the same. A copper foil with conductive columns is bonded to an encapsulated die by thermal compression, between thereof there is a pre-curing dielectric film sandwiched. The dielectric film is cured to form a dielectric layer of a die build-up package and the copper foil on the dielectric layer is etched to form the conductive traces. At least one conductive column in one of the dielectric layers is vertically corresponding to one of conductive column in the adjacent dielectric layer.

Method for making a build-up package of a semiconductor

A semiconductor build-up package includes a die, a circuit board and at least a dielectric layer. The circuit board has a surface for building up the dielectric layer, and the surface has a cavity for accommodating the die. The inside of multi-layer circuit board has conductive traces for expanding the electrical function of semiconductor build-up package. Each dielectric layer has conductive columns so that the die may electrically connect with the outermost dielectric layer. At least a conductive column is bonded on the surface of the multi-layer circuit board for inner electrical connection.

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Kaohsiung, Taiwan

In-De Ou