Samsung Electronics Co., Ltd.

In Cheol Nam

Chang Soo Lee

Jiyong Kim

Dae Sun Kim

Jongdoo Kim

Daeyoung Noh

Chan Min Park

Sung Hee Han

Daeseung Park

Youngkon Lim

Jin Seon Kim

Jin Seok Jeong

Ki Jong Sung

Kyoungho Bae

Younghwan Hong

An electronic device is provided. The electronic device includes a housing, a key button structure in the housing, and a plurality of antenna elements spaced apart from the key button structure into an inner space. The key button structure includes a flexible printed circuit board, and a dome which is pressed by at least one key button when the at least one key button moves into the inner space, and electrically connected to the flexible printed circuit board. When the key button structure is vertically viewed, an antenna module may overlap a portion of the flexible printed circuit board.

Electronic device including structure in which key button and antenna module overlap

An electronic device is provided. The electronic device includes a housing, a substrate disposed in an internal space of the housing, a battery disposed on a plane identical with a plane of the substrate, a support structure disposed to at least partially overlap the substrate when the substrate is viewed from a top, an antenna structure configured to include a dielectric substrate and at least one coil member disposed in the dielectric substrate as an antenna disposed to at least partially overlap the battery when the battery is viewed from the top, a tape member configured to include a first region at least partially overlapping the support structure, a second region at least partially overlapping the antenna structure, and a connection part connecting the first region and the second region when the support structure is viewed from the top. The dielectric substrate may include at least one extension part extended from the dielectric substrate and configured to at least partially overlap the connection part when the antenna structure is viewed from the top. The at least one extension part may include a plurality of dummy patterns formed at designated intervals and/or in a designated shape.

Electronic device including antenna structure

A semiconductor memory apparatus includes a memory cell unit and an internal voltage stabilization apparatus. The memory cell unit includes a row decoder, a column decoder, and a memory cell array. The internal voltage stabilization apparatus includes an operation termination determination unit configured to determine whether an operation of the semiconductor memory apparatus is terminated on the basis of an external input voltage and output an operation termination command, a termination voltage generation unit configured to generate a termination voltage having a preset voltage value on the basis of a determination result of operation termination by the operation termination determination unit, and a switch unit. The switch unit includes a plurality of switches that are turned in response to the operation termination command, and supplies the termination voltage, input from the termination voltage generation unit, to a plurality of internal nodes of the memory cell array.

Semiconductor memory apparatus and method of driving the same

A dynamic random access memory (DRAM) device includes a memory cell array including a first sub memory cell array block including a plurality of first memory cells between a plurality of first sub word lines, and a plurality of first odd-numbered bit lines and a plurality of dummy bit lines and includes a second sub memory cell array block including a plurality of second memory cells between a plurality of second sub word lines, a plurality of second odd-numbered bit lines, and a plurality of second even-numbered bit lines. The memory cell array may be arranged to have an open bit line architecture in which the plurality of first odd-numbered bit lines and the plurality of second even-numbered bit lines form bit line pairs. When the first sub word line may be selected, a predetermined voltage may be applied to the plurality of dummy bit lines for a first predetermined period in which a charge sharing operation is performed on the plurality of first memory cells connected to the selected one of the plurality of first sub word lines.

Dynamic random access memory device

A semiconductor device includes a substrate including an active region and an element isolation region defining the active region, a gate trench extending into the element isolation region and penetrating the active region, and a gate structure filling the gate trench and including a first conductivity-type semiconductor layer, a conductive layer, and a second conductivity-type semiconductor layer, sequentially stacked from a lower portion of the gate trench.

Semiconductor device

Growing community of inventors

Hwaseong-si, South Korea

In Cheol Nam