Intel Corporation

Ilya Sharapov

Jonathan M Eastep

Richard J Greco

David N Lombard

Hari K Nagpal

Rohit Banerjee

Steve S Sylvester

Devadatta V Bodas

Justin J Song

Charles R Yount

Muralidhar Rajappa

Brian J Griffith

Ramakrishna Huggahalli

Meenakshi Arunachalam

Scott B Huck

Rob F Van Der Wijngaart

Lingdan (Linda) Zeng

Apparatus, systems, and methods provide dynamic spatial power steering among a plurality of power domains in the computer system on a per phase basis of a particular application. Dynamic spatial power steering may include, for example, determining a plurality of phases corresponding to an application comprising tasks for execution on a processing node. determining a spatial power distribution between a plurality of power domains on the processing node based on a performance metric for each phase, monitoring the application to detect a current phase, and applying the spatial power distribution correspond to the current phase to the plurality of power domains.

Systems and methods for dynamic spatial power steering

Systems and methods may provide a set of networked computational resources such as nodes that may be arranged in a hierarchy. A hierarchy of performance balancers receives performance samples from the computational resources beneath them and uses the performance samples to conduct a statistical analysis of variations in their performance. In one embodiment, the performance balancers steer power from faster resources to slower resources in order to enhance their performance, including in parallel processing.

Dynamic hierarchical performance balancing of computational resources

A method of assessing energy efficiency of a High-performance computing (HPC) system, including: selecting a plurality of HPC workloads to run on a system under test (SUT) with one or more power constraints, wherein the SUT includes a plurality of HPC nodes in the HPC system, executing the plurality of HPC workloads on the SUT, and generating a benchmark metric for the SUT based on a baseline configuration for each selected HPC workload and a plurality of measured performance per power values for each executed workload at each selected power constraint is shown.

Method to assess energy efficiency of HPC system operated with and without power constraints

Systems and methods may provide a set of cores capable of parallel execution of threads. Each of the cores may run code that is provided with a progress meter that calculates the amount of work remaining to be performed on threads as they run on their respective cores. The data may be collected continuously, and may be used to alter the frequency, speed or other operating characteristic of the cores as well as groups of cores. The progress meters may be annotated into existing code.

Progress meters in parallel computing

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San Jose, CA, United States of America

Ilya Sharapov