Freescale Semiconductor,inc.

Ilan Strulovici

Erez Arbel-Meirovich

Adi Katz

Stefania Gandal

Amit Rossler

A device and a method for testing a DMA controller. The device includes: (i) a DMA controller that includes a first data transfer path and a second data transfer path, wherein the first data transfer path and the second data transfer path are mutually independent; (ii) a test unit, connected to the first and second data transfer paths, that is adapted to control a transfer of data between the first data transfer path and the second data transfer path during a test mode, while masking from a first memory unit coupled to the DMA controller, at least one control signal associated with the transfer of data.

Device and method for testing a direct memory access controller

A method and device for sharing data. The method include: receiving, by a direct memory access controller, a data read instruction; wherein the read data instruction can be a shared data read instruction or a non-shared data read instruction; determining whether to fetch a requested data block from a first memory unit to a second memory unit by applying a direct memory address control operation; wherein the second memory unit is accessible by a processor that generated the shared data read instruction; fetching the requested data block from the first memory unit to the second memory unit by applying a direct memory access control operation, if the read data instruction is a non-shared data instruction or if the read data instruction is a shared data instruction but the requested data is not stored in the second memory unit; and retrieving a requested data block from a second memory unit.

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Kiryat Motzkin, Israel

Ilan Strulovici