3com Corporation

3 Com Corporation

Cisco Systems O.i.a. (1988) Ltd.

Ilan Glaser

Yehuda Moyal

Yackov Sfadya

Amit Lewin

Yuri Poddobny

Yehezkel Levi

Simon Grinberg

A novel and useful apparatus for and method of in-band clock compensation for use in synchronous communication systems. The clock compensation mechanism is implemented in each module and is operative to compensate for the differences between the clocks among the various modules in the system. The mechanism operates in band wherein special clock compensation symbols are periodically inserted into the data stream itself. Additional clock sync symbols are added to the data stream depending on the current level of the FIFO queue on the module or card. The insertion (or non-insertion) of additional symbols functions to compensate for the faster (or slower) clock of the module when compared to that of the reference.

Apparatus for and method of in-band clock compensation

An apparatus for and method of encapsulating Ethernet frame data in HDLC frames for transmission over a VDSL transport facility. The HDLC frames are transmitted over a point to point VDSL link where they are subsequently extracted and forwarded as standard Ethernet frames. The VDSL facility transport system comprises one or more Ethernet to VDSL CPEs coupled to a DSLAM over a VDSL transport facility. The Ethernet to VDSL CPE functions to receive a 10BaseT Ethernet signal and encapsulate the Ethernet frame into a HDLC frame for transmission over the VDSL facility. In one embodiment, a single chip microcontroller on the CPE performs both Ethernet controller and HDLC controller functions. The DSLAM is adapted to receive HDLC frames from one or more CPEs, extract Ethernet frames therefrom and generate and output a standard Ethernet signal. Ethernet frames are encapsulated within HDLC frames and transmitted on the wire pair without regard to the state of the SOC signals. This overcomes the problems associated with synchronizing the transmission of the Ethernet data with the SOC signals.

Ethernet frame encapsulation over VDSL using HDLC

An apparatus for and a method of reducing the packet length count processing of data packets in a network device. The apparatus and method determine the length and end of a packet at the ingress point of the network computing device, e.g., a switch or router, using a single counting function. After the counting function verifies the length of the data packet, a signal indicating the length of a data packet is generated. This packet length indicator signal is then propagated throughout the system along with the data packet itself. The packet length indicator signal is then used at all decision points that involve the data packet. The packet length indicator signal itself is generated so as to indicate the beginning of the start of the data packet in addition to the end of the data packet, thus indicating the length of the packet. This obviates the need for the length of the packet to be counted over and over again in the course of processing the data packet within the switch or router.

Apparatus and method of reducing packet length count processing

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Tel Aviv, Israel

Ilan Glaser