Amkor Electronics, Inc.

Amkor Technology, Inc.

Anam Semiconductor Inc.

Anam Industrial Co., Ltd.

Anam Industrial Col, Ltd.

Il Kwon Shim

Young Wook Heo

Robert Francis Darveaux

Bruce J Freyman

Sun Ho Ha

John Briar

Robert Francis Darreaux

A method for marking poor quality printed circuit board units of a printed circuit board strip for ball grid array semiconductor packages wherein at least one degradation-indicating hole is at least partially formed in a poor quality printed circuit board unit of the strip at a region defined between an outer edge of the resin seal molding region of the unit and a cutting line formed on the printed circuit board strip to separate the unit from the strip. Even when a plurality of printed circuit board strips are packed in a vacuum under the condition in which they are stacked, there is no phenomenon that those strips in the pack are permanently deformed, for example, permanently bent. Also, there is no phenomenon that melt resin is leaked from the mold, thereby causing it to be bled out onto the upper surface of the printed circuit board strip. Since no paint is used to mark poor quality printed circuit board units, there is no problem associated with the use of the paint such as a contamination.

Marking Bad printed circuit boards for semiconductor packages

Provided with a method of manufacturing a ball grid array semiconductor package using a flexible circuit board strip, which is directed to prevent minute conductive traces in the outer part of a circuit pattern formed in the flexible circuit board and thus minimize the short-circuits by forming notches on the flexible circuit board in the vicinity of the lower side ends of a resin encapsulant section by use of a punch, and pressing down the resin encapsulant section with a singulation tool to remove the carrier frame and separate the ball grid array semiconductor packages in the piece.

Method of manufacturing ball grid array semiconductor package

A ball grid array semiconductor package using a flexible circuit board, in which the flexible circuit board has no conductive via hole nor solder mask while having a thin structure formed at only one surface thereof with a circuit pattern having a small length. The flexible circuit board is mounted with a metallic carrier frame to achieve an easy handling thereof, a reduction in the inductance, impedance and coupling effect of adjacent circuit patterns and an easy discharge of heat from a semiconductor chip, thereby achieving an improvement in electrical performance and an improvement in heat discharge performance. The metallic carrier frame has a plurality of openings adapted to increase the bonding force between an encapsulate and constituting elements of the package, thereby removing a bending phenomenon of the package, and a method for fabricating such a BGA semiconductor package. The invention also provides a method for fabricating such a BGA semiconductor package.

Ball grid array semiconductor package with solder balls fused on printed

A flexible circuit board for a ball grid array semiconductor package including a flexible resin film, a plurality of electrically conductive traces formed on an upper surface of the resin film, the conductive traces having solder ball pads, and a die flag including a semiconductor chip paddle located on a central portion of the circuit board, the chip paddle having a plurality of heat-discharging and grounding solder ball pads, and a plurality of lattice-shaped traces adapted to electrically connect the solder ball pads, the traces being shaped into a lattice to prevent a bleed-out of a silver-filled epoxy resin, a ground bonding rim located around the chip paddle, and a plurality of radial traces adapted to electrically connect the chip paddle to the ground bonding rim, and the flexible resin film being perforated to define solder ball lands on lower surfaces of the solder ball pads. Since the semiconductor chip paddle has an enlarged opened portion, it is possible to minimize the gold plated region, thereby greatly reducing the manufacturing costs. It is also possible to minimize a deformation of the package caused by mechanical stress generated due to a difference in thermal expansion coefficient between different materials of package elements. A bleed-out of silver-filled epoxy resin is also surely prevented.

Flexible circuit board for ball grid array semiconductor package

A unit printed circuit board (PCB) carrier frame used in the fabrication of a heat sink-attached ball grid array (BGA) semiconductor packages and a method for BGA semiconductor packages using the unit PCB carrier frame. The unit PCB carrier frame has a plurality of die pads each defined at its peripheral edges by elongated slots formed at a strip or reel-shaped frame member. For the fabrication of heat sink-attached BGA semiconductor packages, unit PCBs are bonded to the die pads of the unit PCB carrier frame. Accordingly, the bending of the packages is minimized even when they pass through subsequent processes requiring a high temperature. As a result, it is possible to obtain a maximum number of unit PCBs from a PCB panel, thereby achieving an improvement in productivity.

Unit printed circuit board carrier frame for ball grid array

A BGA (ball grid array) semiconductor package with improved heat dissipation and dehumidification effect is disclosed. The above BGA package is provided with an open through slot on the chip mounting portion of the printed circuit board and/or the heat sink. The above through slot is occluded by neither the heat conductive epoxy resin nor the solder mask but is simply opened, thus directly exposing the bottom surface of the semiconductor chip to the outside of the package and effectively performing heat dissipation and dehumidification without causing any pop corn phenomenon during the dehumidification reflow. The size of the open through slot is not larger than the semiconductor chip. The open through slot is selected from among a rectangular slot, a large circular slot, a plurality of small circular slots, a radial slot, a cross slot or any combination thereof.

Ball grid array semiconductor package with improved heat dissipation and

A BGA (ball grid array) semiconductor package with a ring-type heat sink is disclosed. In the above package, the heat dissipating area is enlarged by extending the edge of a chip mounting die paddle formed of a copper or copper alloy layer to the outside of the package. The ring-type heat sink is attached to the extended portion of the die paddle such that the heat sink surrounds the encapsulant of the package. The above BGA package thus directly and effectively dissipates the chip's heat through the heat sink with high thermal conductivity. A plurality of plated through holes may be formed on the chip mounting portion of the PCB of the above package. The BGA package with both the ring-type heat sink and the PTHs, the heat dissipating effect of the package is further improved.

Ball grid array semiconductor package with ring-type heat sink

Method and circuit board structure for leveling the tops of solder balls of a BGA semiconductor package is disclosed. In order to level the solder balls, the sizes of solder ball lands used for welding the solder balls to the circuit board are controlled in accordance with portions of the circuit board. The invention thus achieves the coplanarity of the solder balls regardless of thermal bending of the plastic body and circuit board of the BGA semiconductor package. In an embodiment, a plurality of solder ball lands having different sizes are formed on the circuit board prior to forming the solder balls on the lands. In another embodiment, a plurality of solder ball lands having the same size are formed on the circuit board prior to forming an insulating mask on the circuit board in order to form differently-sized exposed inside portions of solder ball lands.

Method and circuit board structure for leveling solder balls in ball

According to the invention, an electronic device mounted on a substrate is encapsulated using a standard two-piece mold. A novel degating region is formed on a surface of the substrate to allow removal of excess encapsulant formed on the surface during molding without damaging the remainder of the device. The material of the degating region that contacts the encapsulant forms a weak bond with the encapsulant, relative to the bond formed between the encapsulant and the substrate, so that the encapsulant can be peeled away from the degating region without damaging the substrate or other portion of the device. The degating region is provided without introducing additional steps into the process for forming the device. The presence of the degating region eliminates the necessity of using a three-piece or modified two-piece mold to achieve top gating in order to degate without damaging the device. In one embodiment, the degating region is made of gold. Gold has an adhesive force with typical encapsulant materials that is approximately 10% of the adhesive force between the typical encapsulant materials and typical substrate materials.

Growing community of inventors

Seoul, South Korea

Il Kwon Shim