Samsung Electronics Co., Ltd.

Skhynix Inc.

Seoul National University

Hyundai Motor Company

Kia Motors Corporation

Osong Medical Innovation Foundation, Korea University Research and Business Foundation

Samsung Display Co., Ltd.

Purdue Research Foundation

Sungkyunkwan University

Dongwoo Fine-chem Co., Ltd.

Ls Industrial Systems Co., Ltd.

Yura Corporation Co., Ltd.

Dae Won San Up Co., Ltd.

Genewel Co., Ltd.

Il Han Park

Sung-won Yun

Hyejin Yim

Han Jun Lee

Soojung Ryu

Chang Hoon Kwak

Dong Kwan Suh

Hokyoon Lee

Jin-Young Kim

Sang-Soo Park

Seung Bum Kim

Kwangho Choi

Joonsuc Jang

Se Hwan Park

Young Pyo Joo

Jeongwook Kim

Dae Ig Jung

Byung Soo Kim

Ji-sang Lee

Dong-Hoon Yoo

Jong-Hoon Lee

Eun Sue Kim

Dae Seok Byeon

Dong-hoon Yoo

Yongsung Cho

Byung Gook Park

Seong Ik Hong

Hyun Jun Yoon

Jung-Ho Song

Seong Ah Joo

Seon-Wook Kim

Jae-Yun Lee

Jin Ho Baek

Ho Kyoon Lee

Jin Bae Bang

Seung Hwan Song

Na Na Park

Ho-Kyoon Lee

Tae Hyung Kim

Jong Soo Kim

Sang Heon Lee

Minsu Kim

Youngmin Kim

Minseok Kim

Jong Min Kim

Keon Kuk

Jung Hoon Kim

Hyun Seok Seo

Tae Hong Kim

Sang-Jin Byeon

Hyun Jung Kim

Taek-Sang Song

Jin Han Kim

Seung-Bum Kim

Sangyong Yoon

Min Jae Kim

Dong Hwi Kim

Hyo Jin Lee

Doo Hyun Kim

Jong-Jin Lee

Kang-Bin Lee

Sung Hyun Lee

Kihwan Choi

Keun Sig Lim

Mithuna Shamabhat Thottethodi

Sung Hun Lee

Yun Jae Jung

Sung-Min Hong

Jun Hee Yoo

Seon Wook Kim

Su Chang Jeon

Kyu Jin Lee

Cheol Jun Yoo

Soo Hong Ahn

Beom Joo Kwon

Ji-Suk Kim

Bong Soon Lim

Jae Young Jang

Kiwhan Song

Woo Hyek Choi

Sun Ho Hur

Su-Yong Kim

Tsuyoshi Tsutsui

Jang Ryul Kim

Dongsoo Kang

Seul Ong Kim

Han Bae Lee

Hyun Kook Park

Sang Yong Koo

Euicheol Lim

Chang Soon Choi

Jong Ho Lim

Kyung Il Seo

Da Eun Song

Miseon Han

Won Jong Song

Na-Young Choi

Seung Woo Yang

Jae Hun Cha

Jin Gyu Cha

A memory device including a first substrate, a peripheral circuit provided on the first substrate, a first metal bonding layer provided on the peripheral circuit, a second metal bonding layer directly bonded to the first metal bonding layer, a memory cell array provided on the second metal bonding layer; and a second substrate provided on the memory cell array. A page buffer circuit in the peripheral circuit receives a verification result through the metal bonding layers, divides the verification result into stages, and sequentially outputs the verification result for the division into the stages, and a pass/failure checker in the peripheral circuit sequentially performs a counting operation about each of the stages to generate accumulated values, and compares the accumulated values and a reference value which increases from an initial value as the counting operation is performed, and the initial value is set by an external memory controller.

Nonvolatile memory device, operation method of a nonvolatile memory device, and operation method of a controller

A nonvolatile memory device includes a memory cell array having cell strings that each includes memory cells stacked on a substrate in a direction perpendicular to the substrate. A row decoder is connected with the memory cells through word lines. The row decoder applies a setting voltage to at least one word line of the word lines and floats the at least one word line during a floating time. A page buffer circuit is connected with the cell strings through bit lines. The page buffer senses voltage changes of the bit lines after the at least one word line is floated during the floating time and outputs a page buffer signal as a sensing result. A counter counts a number of off-cells in response to the page buffer signal. A detecting circuit outputs a detection signal associated with a defect cell based on the number of off-cells.

Nonvolatile memory device and operation method of detecting defective memory cells

A storage device includes a storage controller that receives a protecting command before a thermal process is performed in the storage device, and that generates a protecting pattern by programming a protecting voltage in a converged region where threshold voltage distributions of memory cells in the storage device converge after the thermal process is performed on the storage device.

Storage device and operating method thereof

Disclosed is a memory device which includes a history table and communicates with a storage controller. A method of operating the memory device includes receiving a first request indicating a first core operation of a first memory block from the storage controller, determining whether history data of the first memory block have a first value or a second value, with reference to the history table, in response to the first request, when it is determined that the history data of the first memory block have the first value, performing the first core operation corresponding to a first type on the first memory block, and after performing the first core operation corresponding to the first type on the first memory block, updating the history data of the first memory block in the history table from the first value to the second value.

Memory device, method of operating the same, and method of operating storage device including the same

A memory device includes: a first substrate; a peripheral circuit provided on the first substrate; a first metal bonding layer provided on the peripheral circuit; a second metal bonding layer directly bonded to the first metal bonding layer; a memory cell array provided on the second metal bonding layer; and a second substrate provided on the memory cell array. A page buffer circuit in the peripheral circuit receives a verification result through the metal bonding layers, divides the verification result into stages, and sequentially outputs the verification result for the division into the stages, and a pass/failure checker in the peripheral circuit sequentially performs a counting operation about each of the stages to generate accumulated values, and compares the accumulated values and a reference value which increases from an initial value as the counting operation is performed, and the initial value is set by an external memory controller.

Nonvolatile memory device

A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.

Memory device

Nonvolatile memory device, storage device, and operation method of storage device

A memory may include: a pseudorandom number generator suitable for generating a pseudorandom number using an initial value transferred from a memory controller; an access key register suitable for storing an access key transferred from the memory controller; a counter suitable for counting the number of times that the access key register is updated to generate an update number; a logic operation circuit suitable for generating an authentication key by performing a logic operation on the pseudorandom number and the update number; a comparison circuit suitable for comparing the access key and the authentication key; and a security area to which access is allowed when the comparison result of the comparison circuit indicates that the access key and the authentication key are the same.

Memory and memory system

A window substrate integrated with a polarizing plate and a method of preparing the same is provided. A window substrate integrated with a polarizing plate comprises a base substrate, a non-display pattern disposed on a non-display part of one surface of the base substrate, and a liquid crystal polarizing layer disposed on a display part of the same surface as the non-display pattern. A display device having a reduced thickness and a colored non-display pattern is achieved using the widow substrate.

Window substrate integrated with polarizing plate and method of preparing the same

A memory device includes a data storage region and a spare column remap storage. The data storage region includes a plurality of sub-arrays, and each of the plurality of sub-arrays has a plurality of main columns and a plurality of spare columns. The spare column remap storage includes a plurality of storage units storing column address information of a repaired main column of one of the plurality of sub-arrays and address information of a repaired main column of another of the plurality of sub-arrays into at least one of the plurality of storage units included in the spare column remap storage.

Memory devices having spare column remap storages and methods of remapping column addresses in the memory devices

Memory device for changing pass voltage

A data processing system includes a memory device; buffer entries each including a plurality of slabs; a prefetch circuit configured to prefetch data from the memory device and store the data in the buffer entries; and processing circuits respectively corresponding to the slabs, each processing circuit being configured to sequentially demand-fetch and process data stored in corresponding slabs in the buffer entries, wherein each processing circuit checks, when demand-fetching data from a first slab among corresponding slabs, a prefetch trigger bit of a first buffer entry in which the first slab is included, determines, when it is determined that the prefetch trigger bit is set, whether all data stored in the slabs included in a second buffer entry is demand-fetched, and triggers, when it is determined that all the data is demand-fetched, the prefetch circuit to perform prefetch of subsequent data to the second buffer entry.

Data processing system for prefetching data to buffer entries and operating method of the data processing system

The present invention relates to an antibacterial dressing and a method for preparing the same. According to the present invention, there are provided an antibacterial dressing containing a rapid cell membrane-penetrating component that exhibits excellent bactericidal and antibacterial activities by disrupting the structure and synthesis of protein and nucleic acid, and a method for preparing the same.

Antibacterial dressing material and preparing method therefor

A nonvolatile memory device may include a page buffer including a plurality of latch sets that latch each page datum of selected memory cells among a plurality of memory cells according to each of read signal sets including at least one read signal, and a control logic configured to detect a degradation level of the memory cells and determine a read parameter applied to at least one of the read signal sets based on the detected degradation level.

Nonvolatile memory device configured to adjust a read parameter based on degradation level

Growing community of inventors

Suwon-si, South Korea

Il Han Park