Hitachi, Ltd.

Other

Hitachi Vlsi Engineering Corp.

Renesas Technology Corp.

Ikuo Yoshida

Satoshi Imasu

Takahiro Naito

Yoshiyuki Kado

Hiroshi Kikuchi

Naotaka Tanaka

Tetsuya Hayashida

Yasuhiro Naka

Akira Yamagiwa

Shinobu Takeura

Takashi Nakao

Kanji Otsuka

Toshihiko Sato

Akiomi Kohno

Masaya Horino

Hideaki Kamohara

Hiroshi Akasaki

Kunizo Sahara

Yoshiaki Emoto

Tsukio Funaki

Norio Kishikawa

Masayuki Iketani

Koichiro Sekiguchi

Shouichi Irie

Hideo Miura

Hideko Ando

Kazuyuki Taguchi

Tomo Shimizu

In a semiconductor device adapted to be mounted on a board and to be electrically connected to the board, comprising, at least two semiconductor electric chips, and a substrate on which the semiconductor electric chips are mounted and to which the semiconductor electric chips are electrically connected, in such a manner that the semiconductor electric chips are mounted on and electrically connected to the board through the substrate, according to the present invention, a thickness of each of the semiconductor electric chips in a direction in which the each of the semiconductor electric chips and the substrate are stacked is smaller than a thickness of the substrate in the direction.

Semiconductor device

In a multi-chip-module type semiconductor device, first and second semiconductor elements, a main component of each of the semiconductor elements being semiconductor material to form a semiconductor electric circuit in each of the semiconductor elements, are mounted on and electrically connected to a substrate adapted to be mounted onto a mother board and to be electrically connected to the mother board so that the each of the semiconductor elements is electrically connected to the mother board through the substrate.

Multi-chip semiconductor device with specific chip arrangement

Silicon chip having narrow pitches of Au bumps are mounted on a module substrate in such a way that while taking into consideration a difference in coefficient of thermal expansion between the silicon chip and the module substrate, a total pitch of electrode pads of the silicon chip is made narrower than a total pitch of the Au bumps, thereby preventing misregistration between the Au bumps and the electrode pads in the course of heat treatment to ensure reliable contact therebetween.

Method of manufacturing a multi-chip module

An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.

Process for mounting electronic device and semiconductor device

A technique to be applied to improve the reliability of a magnetic disk apparatus is disclosed. In detail, a magnetic disk apparatus comprises a disk-shaped magnetic recording medium that rotates in operation, a magnetic head for writing the data in the magnetic recording medium and for reading out the data written in the magnetic recording medium, a carriage mechanism having an arm on which the magnetic head is located and moving the magnetic head to an arbitrary position on the magnetic recording medium, a wiring member having wiring, a semiconductor chip having a first main surface and a second main surface that are opposed to each other and electrodes formed on the first main surface, the semiconductor chip being fixed to the wiring member in the state that the electrodes are facing to the wiring of the wiring member, and a housing that contains the magnetic recording medium, the magnetic head, the carriage mechanism, the wiring member, and the semiconductor chip, wherein the edge of the first main surface side of the semiconductor chip and the edge of the second main surface side are covered with insulative resin.

Magnetic disk apparatus

In order to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric connection between each of bump pads formed on LSI chips and each of electrode pads formed on an interconnection substrate, within an guaranteed temperature range, a thermal expansion coefficient of an adhesive ( ) is in the range of 20 to 60 ppm, and an elastic modulus of a build-up portion ( ) is in the range of 5 to 10 GPa. Further, the build-up portion ( ) is constituted by a multi-layer build-up substrate in which buid-up portion a peak value (a glass transition temperature) of a loss coefficient exists within a range of 100&deg; C. to 250&deg; C. and does not exist within a range of 0&deg; C. to 100&deg; C. By setting or selecting the physical properties in the manner disclosed above, it is possible to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric bonding between the bump pads ( ) formed on the LSI chips ( ) and the electrode pads ( ) on the interconnection substrate ( ) within an guaranteed temperature range.

Disclosed herein is a semiconductor device, which comprises a semiconductor chip including, over one main surface thereof, first wirings, protective films formed so as to cover other portions excluding parts of the first wirings, flexible layers respectively formed on the protective films so as to exclude the parts of the first wirings, and second wirings having first portions respectively electrically connected to the parts of the first wirings, and second portions respectively drawn onto the flexible layers; a wiring board having third wirings over one main surface thereof; and an adhesive comprising a large number of conductive particles contained in an insulative resin, and wherein the semiconductor chip is bonded to the wiring board with the adhesive interposed therebetween in a state in which the one main surface thereof is face to face with the one main surface of the wiring board, and the second portions of the second wirings are respectively electrically connected to the third wirings with some of the large number of conductive particles interposed therebetween.

Semiconductor device its manufacturing method and electronic device

An electronic device comprising: a semiconductor chip having plural electrode pads on one main surface thereof; a wiring board having plural connection parts; and plural salient electrodes disposed respectively between the electrode pads of the semiconductor chip and the connection parts of the wiring board to provide electrical connections between the two, the salient electrodes being arranged in an array not providing balance of the semiconductor chip with respect to one main surface of the wiring board, the plural connection parts of the wiring board being arranged at a deeper position than one main surface of the wiring board in a depth direction from the one main surface.

Electronic device and a method of manufacturing the same

Method of manufacturing a semiconductor device

A central portion of a main face of a package substrate is mounted with a memory chip using face down bonding by a flip chip bonding system. Further, a plurality of chip condensers are mounted at vicinities of the memory chip . A clearance between a main face (lower face) of the memory chip and a main face of the package substrate is filled with underfill resin (seal resin) constituting a seal member for achieving protection of connecting portions and for relaxation of thermal stress. An outer edge of the underfill resin is extended to an outer side of the memory chip and covers entire faces of the chip condensers mounted at vicinities of the memory chip

Semiconductor device and a method of manufacturing the same

Growing community of inventors

Musashimurayama, Japan

Ikuo Yoshida