Hiroshima University

Ikuo Suemune

Masamichi Yamanishi

Masataka Hirose

Tadao Ichikawa

Tadashi Ae

Noriyoshi Yoshida

Yukio Osaka

Yasuo Kan

The disclosed light emitting semiconductor device has an n-type (or p-type) base region sandwiched by a p-type (or n-type) emitter region and a p-type (or n-type) collector region. An injecting voltage source is connected across the emittter region and base region so as to apply a constant voltage therebetween, while a control voltage source is connected across the emitter region and the collector region so as to selectively apply a reverse bias to a base-collector junction for controlling recombination of carriers injected to the base region. The control voltage source produces such non-emitting period voltage and emitting period voltage that carriers injected during the non-emitting period voltage are captured in the base region while the carriers thus captured are allowed to recombine during the emitting period voltage.

Light emitting semiconductor device

Adjacent memory layers of a multi-layered integrated device as optically coupled, so that data written on one layer can be copied onto its adjacent layers through the optical coupling.

Three-dimensional integrated circuit with optically coupled shared

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Hiroshima, Japan

Ikuo Suemune