Oki Electric Industry Co., Ltd.

Oki Semiconductor Co., Ltd.

Optohub Co., Ltd

Lapis Semiconductor Co., Ltd.

Laurus Corporation

Ikuo Kurachi

Hiroshi Takano

Yasumasa Kashima

Masao Tsujimoto

Takaharu Nakamura

Tetsuhiro Maruyama

Satoshi Ikeda

Seiji Samukawa

Hiroshi Watanabe

Norio Hirashita

Wataru Shimizu

Shinji Kawada

Jun Hashimoto

Yutaka Kamata

Toshikazu Mizukoshi

Zhe-An Lee

To provide a photo detection device and a manufacturing method thereof, the photo detection device comprising a SPAD in which a substrate-manufacturing cost is kept sufficiently low compared to InGaAs, afterpulsing is less and DCR is also reduced. A photo detection device detecting an incident light from an object, comprising: (i) a P-type silicon (Si) substrate; (ii) a P-type germanium (Ge) layer formed by epitaxial growth on a first surface serving as a front surface of the P-type silicon (Si) substrate; and (iii) a P-type thin film silicon (Si) layer formed on the P-type germanium (Ge) layer, (iv) wherein the P-type thin film silicon (Si) layer is divided into a first region and a second region by a Shallow Trench Isolation (STI), multiple single photon avalanche diodes (SPADs) arranged in an array are formed in the first region, and a CMOS transistor circuit driving the SPADs is formed in the second region.

Photo detection device

The semiconductor image sensor of the present invention comprises a light receiving element formed in a silicon substrate under an insulation film of an SOI substrate comprising the silicon substrate, the insulation film formed on the silicon substrate, and a semiconductor layer formed on the insulation film, and composed of a pn junction diode formed in a vertical direction to a main surface of the silicon substrate and having sensitivity to near-infrared light, and a high voltage generating circuit configured to generate an applied voltage for applying a reverse bias voltage to the pn junction diode, and an impurity concentration of the silicon substrate is in a range of 1×10/cmto 1×10/cm, a film thickness is in a range of 300 μm to 700 μm, and the applied voltage is in a range of 10 V to 60 V.

Semiconductor image sensor

A semiconductor biosensor includes a central reaction unit of an inspection equipment. The central reaction unit includes a plurality of first conducting wires, a plurality of second conducting wires, a common electrode source, a plurality of sense-amplifiers, a plurality of non-volatile memory type transistors, and a first oxide film. Each sense-amplifier is connected to a respective second conducting wire. The non-volatile memory type transistors are respectively formed on the second conducting wires. Each non-volatile memory type transistor includes a control gate, a third oxide film, a floating gate, and a second oxide. The first oxide film wraps or covers the first conducting wires. Receptors are fixed on a surface of the first oxide film. A portion of the targets couples with a portion of the receptors to form composite bodies. The sense-amplifiers are configured to detect a change in a current signal based on the charges of the composite bodies.

Semiconductor biosensor and control method thereof

A method for fabricating a semiconductor device, according to the present invention includes the steps of: preparing an SOI substrate, which comprises a semiconductor supporting layer, an oxide layer formed on the semiconductor supporting layer and an SOI layer formed on the oxide layer; forming a semiconductor device on the SOI layer; forming a passivation layer over the SOI substrate, the passivation layer allowing a UV light to pass through it; and applying a UV light to the SOI substrate after the step of forming the semiconductor device is completed.

Method for fabricating semiconductor device

The object is simplification of a manufacturing process for nonvolatile memory by reducing additional processes for forming a charge storage structure, and downsizing of nonvolatile memory. The solution is a manufacturing method for semiconductor memory device including a process for forming sequentially a first oxide film, a first nitride filmon a semiconductor substrate, a process for removing the first oxide filmand the first nitride filmin an element isolating regionB, a process for overhanging the first nitride filmover the first oxide filmby removing the edge of the first oxide filmby cleaning or wet etching, a process for forming a first insulating film(element isolating insulating film) so that a lower density parthaving a lower film density than other parts thereof can be formed in the side part of the fist oxide film, a process for exposing the lower density part, a process for forming a hole in the first insulating filmby eroding the lower concentration partusing cleaning or wet etching, and a process for forming charge storage film in the hole.

Semiconductor memory device and manufacturing method for semiconductor device

An ultraviolet light monitoring system includes first and second electrodes, an evaluation subject film and a power source. The first and second electrodes are opposingly disposed and attract holes which are generated in accordance with irradiation of ultraviolet light. The evaluation subject film is formed in a vicinity of the first and second electrodes, and is a subject of evaluation of damage caused by the irradiation of ultraviolet light. The power source, at times of monitoring of the ultraviolet light, applies a predetermined bias to a series path formed by the first electrode, a gap between the first and second electrodes, and the second electrode.

Ultraviolet light monitoring system

A semiconductor storage device includes: a MOSFET formed on an SOI layer of the transistor forming region; and a MOS capacitor formed on the SOI layer of the capacitor forming region. The MOSFET includes: a gate insulating film formed; a floating gate electrode; a source layer and a drain layer formed; a channel region; a high-concentration diffusion layer, and impurities of a same type as impurities which are diffused in the channel region are diffused at a high concentration in the high-concentration diffusion layer; and a silicide layer covering the high-concentration diffusion layer and the source layer. The MOS capacitor includes a capacitor electrode at the SOI layer. The capacitor electrode of the MOS capacitor is disposed so as to oppose an end portion of the floating gate electrode of the MOSFET, with the gate insulating film therebetween.

Semiconductor storage device having an SOI structure

Semiconductor memory device and manufacturing method for semiconductor memory device

An impurity is ion-implanted with a silicon nitride film formed on a silicon substrate as a mask film to form a source/drain layer of a MOS transistor. Heat treatment for activating the impurity is done as it is without removing the silicon nitride film to thereby produce heat treatment-based stress between the silicon nitride film and the silicon substrate.

Method of manufacturing semiconductor device

A pulse voltage with its frequency set at approximately 1 MHz and achieving a level of approximately 1V on the high level side and a level of &minus;5&tilde;&minus;7V on the low level side is applied to the P-type well . When 1V is applied to a P-type well the resulting forward bias causes electrons to be injected from a source and a drain into the channel (P-type well ) (a). As the voltage applied to the P-type well changes to &minus;5 V, a depletion layer is formed at the channel. At the depletion layer the electrons are accelerated toward a tunnel oxide film (b). The electrons having been accelerated in the channel are injected into the tunnel oxide film , are allowed to move inside the tunnel oxide film by the electrical field at the tunnel oxide film and are finally trapped at a floating gate Thus, a semiconductor memory system that makes it possible to reduce the size of the memory cells, prevents erroneous data write/read and achieves a reduction in power consumption is provided.

Semiconductor memory system

A pulse voltage with its frequency set at approximately 1 MHz and achieving a level of approximately 1V on the high level side and a level of &minus;5&tilde;&minus;7V on the low level side is applied to the P-type well . When 1V is applied to a P-type well , the resulting forward bias causes electrons to be injected from a source and a drain into the channel (P-type well ) (a). As the voltage applied to the P-type well changes to &minus;5 V, a depletion layer is formed at the channel. At the depletion layer , the electrons are accelerated toward a tunnel oxide film (b). The electrons having been accelerated in the channel are injected into the tunnel oxide film , are allowed to move inside the tunnel oxide film by the electrical field at the tunnel oxide film and are finally trapped at a floating gate . Thus, a semiconductor memory system that makes it possible to reduce the size of the memory cells, prevents erroneous data write/read and achieves a reduction in power consumption is provided.

A Si N film and a side wall are provided on an electrode to obtain a Cs capacitor capable of enlarging an area of a memory cell contact of a DRAM, and a hole if formed penetrating an inter-layer film by a selective etching process. The Si N film and the side wall are left without being etched, and an area of the hole through which a substrate is exposed, is smaller than an upper portion area of the hole.

Semiconductor device and manufacturing method thereof

A pulse voltage with its frequency set at approximately 1 MHz and achieving a level of approximately 1V on the high level side and a level of &minus;5&tilde;&minus;7V on the low level side is applied to the P-type well When 1V is applied to a P-type well the resulting forward bias causes electrons to be injected from a source and a drain into the channel (P-type well ) (a). As the voltage applied to the P-type well changes to &minus;5 V, a depletion layer is formed at the channel. At the depletion layer the electrons are accelerated toward a tunnel oxide film (b). The electrons having been accelerated in the channel are injected into the tunnel oxide film are allowed to move inside the tunnel oxide film by the electrical field at the tunnel oxide film and are finally trapped at a floating gate Thus, a semiconductor memory system that makes it possible to reduce the size of the memory cells, prevents erroneous data write/read and achieves a reduction in power consumption is provided.

A semiconductor device of the present invention includes an integrated circuit formed on a first conduction-type semiconductor substrate, an output buffer circuit for outputting a signal obtained from the integrated circuit, a protection circuit for protecting the output buffer circuit and a voltage supply circuit for supplying a voltage to the semiconductor substrate. The output buffer circuit has buffer MOSFETs. The protection circuit has protection elements for preventing electrostatic breakdown of the buffer MOSFETs. Impurity diffusion layers of the buffer MOSFETs are separated from impurity diffusion layers of the protection elements and a field oxide film is therebetween at predetermined intervals. Owing to such a construction, the electrostatic breakdown of each buffer MOSFET can be prevented from occurring.

Semiconductor device having protection device for preventing the

A semiconductor device of the present invention includes an integrated circuit formed on a first conduction-type semiconductor substrate, an output buffer circuit for outputting a signal obtained from the integrated circuit, a protection circuit for protecting the output buffer circuit and a voltage supply circuit for supplying a voltage to the semiconductor substrate. The output buffer circuit has buffer MOSFETs. The protection circuit has protection elements for preventing electrostatic breakdown of the buffer MOSFETs. Impurity diffusion layers of the buffer MOSFETs are separated from impurity diffusion layers of the protection elements and a field oxide film is disposed therebetween at predetermined intervals. Owing to such a construction, the electrostatic breakdown of each buffer MOSFET can be prevented from occurring.

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Tokyo, Japan

Ikuo Kurachi