Samsung Electronics Co., Ltd.

Ikkyun Park

Soongmann Shin

Gyuseok Choe

Hyunju Yi

An embodiment of the method includes transferring a first read command corresponding to a first cell region of the memory device through a first channel, receiving first data, read from the first cell region, from the memory device through a second channel physically separated from the first channel, transferring a status information request command through the first channel, the status information request command request the transfer of status information about a second cell region of the memory device, receiving the status information about the second cell region from the memory device through the first channel, and transferring a second read command corresponding to the second cell region of the memory device through the first channel, at least a portion of a period in which the status information is received through the first channel overlaps a period where the first data is received through the second channel.

Memory controller for communicating memory status information, memory system including the memory controller, and operating method of the memory controller

An operating method of a memory system including a memory device including a plurality of memory chips is provided. The operating method includes setting a parameter indicating a number of the memory chips allowed to operate in parallel for each of a plurality of operation statuses, based on information about power consumption of each of the plurality of operation statuses of a memory chip among the memory chips; obtaining information about an operation status of each of the plurality of memory chips; and scheduling data access across a plurality of channels respectively corresponding to the plurality of memory chips, based on the parameter and the information about the operation status of each of the plurality of memory chips.

Memory controller, memory system and operating method of the memory system using a channel arbitration circuit

Memory controller, memory system and operating method of the memory system for scheduling data access across channels of memory chips within the memory system

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Suwon-si, South Korea

Ikkyun Park