Skhynix Inc.

Ik-Sung Oh

Jin-Woong Kim

Byeong-Gyu Park

Kyeong-Rho Kim

Sung-Kwan Hong

Kyu-Min Lee

A data processing system includes a host configured to handle data in response to an input received by the host, and a plurality of memory systems engaged with the host and configured to store or output the data in response to a request generated by the host. A first memory system among the plurality of memory systems can perform generation, erasure, or updating of metadata for the plurality of memory systems.

Apparatus and method for engaging a plurality of memory systems with each other

A memory system may include: a memory device including a plurality of memory dies suitable for storing data; and a controller operatively coupled to the memory dies of the memory device via a plurality of channels, the controller may be suitable for checking the plurality of the channels, selecting independently best transmission channels and best reception channels among the plurality of the channels according to states of the channels, requesting performing of command operations corresponding to the commands through the best transmission channels to the memory dies, and receiving performance results of the command operations through the best reception channels from the memory dies.

Memory system, data processing system including the same and operating method of the same

A system is used in a data processing system comprising at least one memory system which is operatively engaged and disengaged from a host or from another memory system and the host transmitting commands into the at least one memory system. The system includes a metadata generator configured to generate a map table for an available address range and a reallocation table for indicating an allocable address range in the map table; and a metadata controller configured to allocate the allocable address range to the at least one memory system when the at least one memory system is operatively engaged to the host or to another memory system, or release an allocated range for the at least one memory system such that the allocated range becomes the allocable address range when the at least one memory system is operatively disengaged from the host or the another memory system.

Apparatus and method for managing meta data for engagement of plural memory system to store data

A memory system includes: a memory device including a plurality of memory blocks for storing data; a controller memory including a read data area for storing first data, which is read from a victim memory block among the plurality of memory blocks, and a write data area for storing second data, which is to be written into a target memory block among the plurality of memory blocks; and a controller suitable for reading the first data from the read data area, storing the first data into a host memory, and, when the first data stored in the host memory satisfies a predetermined condition, reading the first data from the host memory and storing the first data into the write data area.

Memory system and operating method thereof

A data processing system includes a host configured to handle data in response to an input entered from an external device. The data processing system further includes a plurality of memory systems engaged with the host, wherein the plurality of memory systems are configured to store or output the data in response to a request generated by the host. A first memory system among the plurality of memory systems can store metadata for the plurality of memory systems.

Apparatus and method for engaging plural memory system with each other to store data

A memory system may include: a memory device including a plurality of memory blocks; and a controller suitable for grouping the memory blocks based on type into a plurality of super blocks according to a preset condition and managing the memory blocks by managing the super blocks, the controller may manage one or more of the super blocks, in each of which at least one bad memory block and good memory blocks are grouped, by classifying the one or more superblocks as first super blocks, and the controller may differently manage uses of the respective first super blocks based on the numbers of bad memory blocks included in the respective first super blocks.

A memory system may include: a memory device including a plurality of memory blocks configured in a plurality of super memory blocks; and a controller suitable for detecting two or more bad super memory blocks each including at least one bad block among the super memory blocks, selecting at least one victim super memory block among the bad super memory blocks, and replacing the at least one bad block in each remaining bad super memory block with at least one normal block of the victim super memory block.

Memory system for effectively organizing super memory block and operating method thereof

A controller may include a first map buffer and a second map buffer suitable for storing map data and hit counts respectively corresponding to the map data, wherein each of the hit counts represents a number of accesses to data stored in a memory device by using a corresponding one among the map data, and wherein the controller swaps the map data and corresponding hit counts between the first and second map buffers such that the first map buffer stores relatively higher hit counts and corresponding map data than the second map buffer.

Growing community of inventors

Gyeonggi-do, South Korea

Ik-Sung Oh