Globalwafers Co., Ltd.

Sunedison Semiconductor Limited (uen201334164h)

Silfex, Inc.

Lam Research Corporation

Igor Peidous

Jeffrey Louis Libbert

Srikanth Kommu

Gang Wang

Shawn George Thomas

Andrew Marquis Jones

Horacio Josue Mendez

Robert J Falster

Carissima Marie Hudson

Soubir Basak

Lu Fei

HyungMin Lee

Alex Usenko

ByungChun Kim

Illaria Katia Marianna Pellicano

Igor Rapoport

Haresh Siriwardane

Samuel Christopher Pratt

Leslie George Stanton

Michelle Rene Dickinson

Jihong John Chen

Rong Wang

George David Stephen Hudelson

Steven M Joslin

Vijay Nithiananthan

Vijay Nithianathan

Andrew M Jones

Hyungmin Lee

Byungchun Kim

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.

High resistivity silicon-on-insulator substrate comprising an isolation region

A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.

High resistivity semiconductor-on-insulator wafer and a method of manufacture

A method for preparing a single crystal silicon ingot and a wafer sliced therefrom are provided. The ingots and wafers comprise nitrogen at a concentration of at least about 1&#xd7;10atoms/cmand/or germanium at a concentration of at least about 1&#xd7;10atoms/cm, interstitial oxygen at a concentration of less than about 6 ppma, and a resistivity of at least about 1000 ohm cm.

High resistivity single crystal silicon ingot and wafer having improved mechanical strength

A high resistivity single crystal semiconductor handle structure for use in the manufacture of SOI structure is provided. The handle structure comprises an intermediate semiconductor layer between the handle substrate and the buried oxide layer. The intermediate semiconductor layer comprises a polycrystalline, amorphous, nanocrystalline, or monocrystalline structure and comprises a material selected from the group consisting of SiGe, SiC, SiGeSn, SiGeSnC, GeSn, group IIIA-nitrides, semiconductor oxides, and any combination thereof.

High resistivity SOI wafers and a method of manufacturing thereof

Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate

A furnace for electromagnetic casting a tubular-shaped silicon ingot is provided. The furnace includes a mold, outer and inner induction coils and a support member. The mold includes an outer crucible and an inner crucible. The outer crucible is annular-shaped. The inner crucible is disposed in the outer crucible and spaced away from the outer crucible to provide a gap between the inner crucible and the outer crucible. The mold is configured to receive granular silicon in the gap. The outer induction coil disposed around the outer crucible. The inner induction coil disposed in the inner crucible. The outer induction coil and the inner induction coil are configured to heat and melt the granular silicon in the mold to form a tubular-shaped silicon ingot. The support member is configured to hold and move a seed relative to the mold during formation of the tubular-shaped silicon ingot on the seed.

Electromagnetic casting systems including furnaces and molds for producing silicon tubes

A cost effective process flow for manufacturing semiconductor on insulator structures is parallel is provided. Each of the multiple semiconductor-on-insulator composite structures prepared in parallel comprises a charge trapping layer (CTL).

Semiconductor on insulator structure comprising a buried high resistivity layer

A method for preparing a single crystal silicon ingot and a wafer sliced therefrom are provided. The ingots and wafers comprise nitrogen at a concentration of at least about 1&#xd7;1014 atoms/cm3 and/or germanium at a concentration of at least about 1&#xd7;1019 atoms/cm3, interstitial oxygen at a concentration of less than about 6 ppma, and a resistivity of at least about 1000 ohm cm.

High resistivity semiconductor-on-insulator wafer and a method of manufacturing

Methods for assessing the quality of a semiconductor structure having a charge trapping layer to, for example, determine if the structure is suitable for use as a radiofrequency device are disclosed. Embodiments of the assessing method may involve measuring an electrostatic parameter at an initial state and at an excited state in which charge carriers are generated.

Methods for assessing semiconductor structures

A crucible includes an outer element and an inner element. The outer element includes a first portion that is horizontal at a bottom end of the crucible and a second portion that ascends radially outwardly from the bottom end of the crucible to a top end of the crucible at a first acute angle to a vertical axis. The inner element includes a conus with a cylinder at a base of the conus. The conus descends radially outwardly from the top end of the crucible to the bottom end of the crucible at a second acute angle to the vertical axis. The inner element includes a base portion of the cylinder attached to the first portion of the outer element using a sealant to form a hollow mold between an inner portion of the outer element and an outer portion of the inner element.

Crucible for casting near-net shape (NNS) silicon

Growing community of inventors

Eaton, OH, United States of America

Igor Peidous