Growing community of inventors

Palo Alto, CA, United States of America

Igor J Malik

Average Co-Inventor Count = 2.44

ph-index = 14

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 709

Igor J MalikSien G Kang (10 patents)Igor J MalikFrancois J Henley (8 patents)Igor J MalikPhilip James Ong (7 patents)Igor J MalikHarry Robert Kirk (5 patents)Igor J MalikNathan W Cheung (1 patent)Igor J MalikWilbur C Krusell (1 patent)Igor J MalikLarry W Shive (1 patent)Igor J MalikMichael I Current (1 patent)Igor J MalikJames Andrew Sullivan (1 patent)Igor J MalikAriel Flat (1 patent)Igor J MalikDavid Jacy (1 patent)Igor J MalikMartin Fuerfanger (1 patent)Igor J MalikWilliam G Eng (1 patent)Igor J MalikIgor J Malik (19 patents)Sien G KangSien G Kang (15 patents)Francois J HenleyFrancois J Henley (149 patents)Philip James OngPhilip James Ong (11 patents)Harry Robert KirkHarry Robert Kirk (11 patents)Nathan W CheungNathan W Cheung (59 patents)Wilbur C KrusellWilbur C Krusell (35 patents)Larry W ShiveLarry W Shive (16 patents)Michael I CurrentMichael I Current (15 patents)James Andrew SullivanJames Andrew Sullivan (6 patents)Ariel FlatAriel Flat (3 patents)David JacyDavid Jacy (1 patent)Martin FuerfangerMartin Fuerfanger (1 patent)William G EngWilliam G Eng (1 patent)
..
Inventor’s number of patents
..
Strength of working relationships

Company Filing History:

1. Silicon Genesis Corporation (17 from 149 patents)

2. Lam Research Corporation (1 from 3,777 patents)

3. Memc Electronic Materials, Inc. (1 from 347 patents)


19 patents:

1. 8187377 - Non-contact etch annealing of strained layers

2. 7598153 - Method and structure for fabricating bonded substrate structures using thermal processing to remove oxygen species

3. 7595499 - Method and system for fabricating strained layers for the manufacture of integrated circuits

4. 7390724 - Method and system for lattice space engineering

5. 7391047 - System for forming a strained layer of semiconductor material

6. 7253081 - Surface finishing of SOI substrates using an EPI process

7. 7147709 - Non-contact etch annealing of strained layers

8. 7094666 - Method and system for fabricating strained layers for the manufacture of integrated circuits

9. 6969668 - Treatment method of film quality for the manufacture of substrates

10. 6881644 - Smoothing method for cleaved films made using a release layer

11. 6455399 - Smoothing method for cleaved films made using thermal treatment

12. 6448152 - Method and system for generating a plurality of donor wafers and handle wafers prior to an order being placed by a customer

13. 6287941 - Surface finishing of SOI substrates using an EPI process

14. 6274059 - Method to remove metals in a scrubber

15. 6265328 - Wafer edge engineering method and device

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as of
12/28/2025
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