Morgan Stanley Services Group Inc.

Igor G Muskatblit

Joshua N Elijah

Michael Gorbovitski

Holger Grund

A data replication and switching device and method, including a plurality of data communication ports, a management port, at least one replicator respectively associated with the data communication port, a Layer 1 ('L1') switch, and a L1 bypass. At least some data received via the at least one of the plurality of ports can be routed to at least one of the plurality of data communication ports and, in response to the configuration data received via the at least one management port, the data replication and switching device can route at least some of the data received via the data communication port to bypass the L1 switch or to route at least some of the data received via the data communication port to the L1 switch.

L1 replicator and switch combination

Data requesting devices and data sending devices are provided. Each of the devices are configured with at least one request port and at least one response port. A packet switched network device is coupled to the respective request ports of the data requesting devices and the data sending devices. Moreover, a low-latency digital programmable controller configured as a central orchestrating unit is coupled to the packet switch network device. A circuit switched network device is coupled to the central orchestrating unit and coupled to at least the respective response ports of the plurality of data requesting devices and the plurality of data sending devices, wherein the circuit switched network device is configured to receive a data request from one of the plurality of data requesting devices for data from one of the plurality of data sending devices, and send the data request to the central orchestrating unit.

Packet switched control, circuit switched data apparatus orchestrated by a low-latency digital programmable controller

In one or more implementations, a data processing device and a data processing method are disclosed that includes a data communication port configured to transmit and receive data to and from at least one computing device. Further, a replicator is included that is configured to replicate ingress data received from the data communication port to a pattern matcher and a field programmable gate array. The pattern matcher is configured to receive the replicated data directly from the replicator and to generate and transmit a trigger signal to the field programmable gate array. Still further, the field programmable gate array is configured to receive the replicated data from the replicator and the trigger signal from the pattern matcher and to perform bit operations on the replicated data as a function of the trigger signal.

Ultra low latency pattern matching system and method

An asynchronous computer-implemented disaggregated processing system including an ethernet transceiver configured to receive data, from a computing device over a data communications network. A core processor is configured to execute to process information associated with at least some of the received data and a memory is configured to store, via a memory controller, processed information from the core processor. A field programmable gate array is configured via an execution implementation directive to parse at least some of the received data; preprocess at least some of the parsed data for use by the core processor; route, to the core processor, the preprocessed data; receive, from the core processor, information associated with the preprocessed data; route, to the computing device, a response associated with the information associated with the preprocessed data received from the core processor; and store, via the memory controller, the information associated with the preprocessed data in the memory.

Growing community of inventors

Mountain View, CA, United States of America

Igor G Muskatblit